JAJSEV1A
September 2017 – February 2018
TPS7A54-Q1
PRODUCTION DATA.
1
特長
2
アプリケーション
3
概要
Device Images
RFコンポーネントの電源
出力電圧ノイズと周波数および出力電圧との関係
4
改訂履歴
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
Voltage Regulation Features
7.3.1.1
DC Regulation
7.3.1.2
AC and Transient Response
7.3.2
System Start-Up Features
7.3.2.1
Programmable Soft Start (NR/SS Pin)
7.3.2.2
Internal Sequencing
7.3.2.2.1
Enable (EN)
7.3.2.2.2
Undervoltage Lockout (UVLO) Control
7.3.2.2.3
Active Discharge
7.3.2.3
Power-Good Output (PG)
7.3.3
Internal Protection Features
7.3.3.1
Foldback Current Limit (ICL)
7.3.3.2
Thermal Protection (Tsd)
7.4
Device Functional Modes
7.4.1
Regulation
7.4.2
Disabled
7.4.3
Current Limit Operation
8
Application and Implementation
8.1
Application Information
8.1.1
Recommended Capacitor Types
8.1.1.1
Input and Output Capacitor Requirements (CIN and COUT)
8.1.1.2
Noise-Reduction and Soft-Start Capacitor (CNR/SS)
8.1.1.3
Feed-Forward Capacitor (CFF)
8.1.2
Soft Start and Inrush Current
8.1.3
Optimizing Noise and PSRR
8.1.4
Charge Pump Noise
8.1.5
Current Sharing
8.1.6
Adjustable Operation
8.1.7
Power-Good Operation
8.1.8
Undervoltage Lockout (UVLO) Operation
8.1.9
Dropout Voltage (VDO)
8.1.10
Device Behavior During Transition From Dropout Into Regulation
8.1.11
Load Transient Response
8.1.12
Reverse Current Protection Considerations
8.1.13
Power Dissipation (PD)
8.1.14
Estimating Junction Temperature
8.2
Typical Application
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.1.1
Board Layout
10.2
Layout Example
11
デバイスおよびドキュメントのサポート
11.1
デバイス・サポート
11.1.1
開発サポート
11.1.1.1
リファレンス・デザイン
11.1.2
デバイスの項目表記
11.2
ドキュメントのサポート
11.2.1
関連資料
11.3
ドキュメントの更新通知を受け取る方法
11.4
コミュニティ・リソース
11.5
商標
11.6
静電気放電に関する注意事項
11.7
Glossary
12
メカニカル、パッケージ、および注文情報
6.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per AEC Q100-002
(1)
±2000
V
Charged-device model (CDM), per AEC Q100-011
±500
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.