JAJSF78L June 2006 – May 2018 TPS65023 , TPS65023B
PRODUCTION DATA.
The DEFDCDC1, DEFDCDC2, and DEFDCDC3 pins are used to set the output voltage for each step-down converter. See Table 20 for the default voltages if the pins are pulled to GND or to VCC. If a different voltage is needed, an external resistor divider can be added to the DEFDCDCx pin as shown in Figure 41.
The output voltage of VDCDC1 is set with the I2C interface. If the voltage is changed from the default, using the DEFCORE register, the output voltage only depends on the register value. Any resistor divider at DEFDCDC1 does not change the voltage set with the register.
PIN | LEVEL | DEFAULT OUTPUT VOLTAGE |
---|---|---|
DEFDCDC1 | VCC | 1.6 V |
GND | 1.2 V | |
DEFDCDC2 | VCC | 3.3 V |
GND | 1.8 V | |
DEFDCDC3 | VCC | 3.3 V |
GND | 1.8 V |
Using an external resistor divider at DEFDCDCx:
When a resistor divider is connected to DEFDCDCx, the output voltage can be set from 0.6 V up to the input voltage V(bat). The total resistance (R1 + R2) of the voltage divider must be kept in the 1-MR range to maintain a high efficiency at light load.
V(DEFDCDCx) = 0.6 V