JAJSFG6A May   2018  – July 2019 LM26420-Q1

PRODUCTION DATA.  

  1. 特長
  2. アプリケーション
  3. 概要
    1.     Device Images
      1.      LM26420デュアル降圧DC/DCコンバータ
      2.      LM26420の効率(最高93%)
  4. 改訂履歴
  5. Pin Configuration and Functions
    1.     Pin Functions: 16-Pin WQFN
    2.     Pin Functions 20-Pin HTSSOP
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics Per Buck
    6. 6.6 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Soft Start
      2. 7.3.2 Power Good
      3. 7.3.3 Precision Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Overvoltage Protection
      2. 7.4.2 Undervoltage Lockout
      3. 7.4.3 Current Limit
      4. 7.4.4 Thermal Shutdown
  8. Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Programming Output Voltage
      2. 8.1.2 VINC Filtering Components
      3. 8.1.3 Using Precision Enable and Power Good
      4. 8.1.4 Overcurrent Protection
    2. 8.2 Typical Applications
      1. 8.2.1 2.2-MHz, 0.8-V Typical High-Efficiency Application Circuit
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Custom Design With WEBENCH® Tools
          2. 8.2.1.2.2 Inductor Selection
          3. 8.2.1.2.3 Input Capacitor Selection
          4. 8.2.1.2.4 Output Capacitor
          5. 8.2.1.2.5 Calculating Efficiency and Junction Temperature
        3. 8.2.1.3 Application Curves
      2. 8.2.2 2.2-MHz, 1.8-V Typical High-Efficiency Application Circuit
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
        3. 8.2.2.3 Application Curves
      3. 8.2.3 LM26420-Q12.2-MHz, 2.5-V Typical High-Efficiency Application Circuit
        1. 8.2.3.1 Design Requirements
        2. 8.2.3.2 Detailed Design Procedure
        3. 8.2.3.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
    3. 10.3 Thermal Considerations
      1. 10.3.1 Method 1: Silicon Junction Temperature Determination
      2. 10.3.2 Thermal Shutdown Temperature Determination
  11. 11デバイスおよびドキュメントのサポート
    1. 11.1 デバイス・サポート
      1. 11.1.1 デベロッパー・ネットワークの製品に関する免責事項
      2. 11.1.2 WEBENCH®ツールによるカスタム設計
    2. 11.2 ドキュメントのサポート
      1. 11.2.1 関連資料
    3. 11.3 ドキュメントの更新通知を受け取る方法
    4. 11.4 コミュニティ・リソース
    5. 11.5 商標
    6. 11.6 静電気放電に関する注意事項
    7. 11.7 Glossary
  12. 12メカニカル、パッケージ、および注文情報

Using Precision Enable and Power Good

The LM26420-Q1 device precision EN and PG pins address many of the sequencing requirements required in today's challenging applications. Each output can be controlled independently and have independent power good. This allows for a multitude of ways to control each output. Typically, the enables to each output are tied together to the input voltage and the outputs ratiometrically ramp up when the input voltage reaches above UVLO rising threshold. There may be instances where it is desired that the second output (VOUT2) does not turn on until the first output (VOUT1) has reached 90% of the desired setpoint. This is easily achieved with an external resistor divider attached from VOUT1 to EN2, see Figure 30.

LM26420-Q1 30069640.pngFigure 30. VOUT1 Controlling VOUT2 with Resistor Divider

If it is not desired to have a resistor divider to control VOUT2 with VOUT1, then the PG1 can be connected to the EN2 pin to control VOUT2, see Figure 31. RPG1 is a pullup resistor on the range of 10 kΩ to 100 kΩ, 50 kΩ is the suggested value. This turns on VOUT2 when VOUT1 is approximately 90% of the programmed output.

NOTE

This also turns off VOUT2 when VOUT1 is outside the ±10% of the programmed output.

LM26420-Q1 30069697.pngFigure 31. PG1 Controlling VOUT2

Another example might be that the output is not to be turned on until the input voltage reaches 90% of desired voltage setpoint. This verifies that the input supply is stable before turning on the output. Select REN1 and REN2 such that the voltage at the EN pin is greater than 1.12 V when reaching the 90% desired set-point.

LM26420-Q1 30069696.gifFigure 32. VOUT Controlling VIN

The power good feature of the LM26420-Q1 is designed with hysteresis in order to ensure no false power good flags are asserted during large transient. Once power good is asserted high, it is not pulled low until the output voltage exceeds ±14% of the setpoint for a during of approximately 7.5 µs (typical), see Figure 33.

LM26420-Q1 30069660.gifFigure 33. Power Good Hysteresis Operation