JAJSNC0D August   2013  – June 2025 TPS62090-Q1

PRODUCTION DATA  

  1.   1
  2. 1 特長
  3. 2 アプリケーション
  4. 3 説明
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Typical Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Enable and Disable (EN)
      2. 6.3.2  Soft Start (SS) and Hiccup Current Limit During Start-Up
      3. 6.3.3  Voltage Tracking (SS)
      4. 6.3.4  Short-Circuit Protection (Hiccup Mode)
      5. 6.3.5  Output Discharge Function
      6. 6.3.6  Power Good Output (PG)
      7. 6.3.7  Frequency Set Pin (FREQ)
      8. 6.3.8  Undervoltage Lockout (UVLO)
      9. 6.3.9  Thermal Shutdown
      10. 6.3.10 Charge Pump (CP, CN)
    4. 6.4 Device Functional Modes
      1. 6.4.1 Pulse Width Modulation Operation
      2. 6.4.2 Power Save Mode Operation
      3. 6.4.3 Low-Dropout Operation (100% Duty Cycle)
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
        1. 7.2.2.1 Inductor Selection
        2. 7.2.2.2 Input and Output Capacitor Selection
        3. 7.2.2.3 Setting the Output Voltage
      3. 7.2.3 Application Curves
    3. 7.3 System Examples
    4. 7.4 Power Supply Recommendations
    5. 7.5 Layout
      1. 7.5.1 Layout Guidelines
      2. 7.5.2 Layout Example
  9. 8 デバイスおよびドキュメントのサポート
    1. 8.1 デバイス サポート
      1. 8.1.1 サード・パーティ製品に関する免責事項
    2. 8.2 ドキュメントのサポート
      1. 8.2.1 関連資料
    3. 8.3 ドキュメントの更新通知を受け取る方法
    4. 8.4 サポート・リソース
    5. 8.5 商標
    6. 8.6 静電気放電に関する注意事項
    7. 8.7 用語集
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

6.4 Device Functional Modes