JAJU808 July   2021

 

  1.   概要
  2.   リソース
  3.   特長
  4.   アプリケーション
  5.   5
  6. 1System Description
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1  System Control and Processing
      2. 2.2.2  Analog Front End
      3. 2.2.3  Input Voltage Monitoring: 5 V, 20 V, 40 V, and ±5 V
      4. 2.2.4  Bidirectional Current Sense: ±2 A
      5. 2.2.5  Unipolar Current Sense: 0.25 A to 1 A
      6. 2.2.6  TMP461-SP: Local and Remote Temperature Sensing
      7. 2.2.7  NTC Thermistor Temperature Sensing
      8. 2.2.8  Adjustable Voltage Source
      9. 2.2.9  Fixed Output Current Source
      10. 2.2.10 Adjustable 4-mA Current Source
      11. 2.2.11 Power Tree and Power Sequencing
    3. 2.3 Highlighted Products
      1. 2.3.1  MSP430FR5969-SP
      2. 2.3.2  ADC128S102QML-SP
      3. 2.3.3  DAC121S101QML-SP
      4. 2.3.4  LMP7704-SP
      5. 2.3.5  INA901-SP
      6. 2.3.6  LM4050QML-SP
      7. 2.3.7  LM158QML-SP
      8. 2.3.8  LM139QML-SP
      9. 2.3.9  TMP461-SP
      10. 2.3.10 TPS7A4501-SP
      11. 2.3.11 TPS7H2201-SP
  8. 3Hardware, Software, Testing Requirements, and Test Results
    1. 3.1 Required Hardware and Software
      1. 3.1.1 Hardware
      2. 3.1.2 Software
    2. 3.2 Test Setup
      1. 3.2.1 Voltage Monitor Test Setup
      2. 3.2.2 Current Monitor Test Setup
    3. 3.3 Test Results
      1. 3.3.1 Voltage Measurement - Noise Floor Results
      2. 3.3.2 Voltage Measurement - Linearity Results
      3. 3.3.3 Current Measurement - Noise Floor Results
      4. 3.3.4 Current Measurement - Linearity Results
      5. 3.3.5 Analog Outputs
  9. 4Design and Documentation Support
    1. 4.1 Design Files
      1. 4.1.1 Schematics
      2. 4.1.2 BOM
    2. 4.2 Documentation Support
    3. 4.3 サポート・リソース
    4. 4.4 Trademarks
  10. 5About the Author

Input Voltage Monitoring: 5 V, 20 V, 40 V, and ±5 V

There are 4 main voltage rails that are monitored: 5 V, 20 V, 40 V, and ±5 V. Each rail is measured using the same architecture; starting with a voltage divider to scale the voltage down to within the input limitation of the operational amplifier (op amp), followed by a buffer stage allowing for high input impedance on the sensor side and a low impedance on the ADC side to ensure fast settling time.

There are two options to effectively measure the lower limit of the circuits and remain within the input voltage limitations of the op amp which is approximately 200 mV greater than the negative voltage supply rail.

For the external ADC variation and internal ADC variation, the voltage reference for the offset voltage is the same as the voltage reference for their respective ADC (external, 5 V or internal, 2.5 V). This negates any noise and inaccuracies created by the offset voltage. The second option includes an external negative bias on the negative voltage supply pin of the op amp to decrease the lower input limitation of the op amp.

To help with calculations of the circuit, the Analog Engineer's Calculator was used to calculate resistor and capacitor values. Table 2-3 and Table 2-4 show the calculated values of Ra, Rb, and Rc determined from the gain and voltage output range of the circuit. The calculated resistor values results with a 0-V input having a 0.2-V output, and the maximum voltage input resulting in a 4.8-V output and 2.5-V output for the external ADC or internal ADC configuration, respectively.

RCB and CCB are charge bucket circuits that help with the settling time of the output signal to drive the ADC128S102QML-SP. Due to the MUXed input of the ADC128S102QML-SP the acquisition and conversion time has to be properly calculated. In this design, the desired bandwidth is 5 kHz per channel. This results in 40 kHz of accumulated bandwidth. Finally, to fulfill the Nyquist Theorem, the resulting sampling rate is double the needed bandwidth, resulting in a final sample rate of 80 kHz or 12.5 µs per sample which leads to a minimum conversion time of 10.156 µs and an acquisition time of 2.3437 µs. To help with calculations of the circuit, the Analog Engineer's Calculator was used to calculate RCB and CCB.

GUID-20210406-CA0I-B6XG-TSGD-B5VW1JZ5MKDC-low.gif Figure 2-3 Voltage Monitoring - Internal ADC Configuration
Table 2-3 Resistor Values for External Configuration With 5-V Reference
VOLTAGE INPUT (V) Ra (kΩ) Rb (kΩ) Rc (kΩ) GAIN
±5 10 115 9.09 0.46
5 10 232 232 0.92
20 100 31.6 576 0.23
40 100 13.7 287 0.115
Table 2-4 Resistor Values for MSP430™ Configuration With 2.5-V Reference
VOLTAGE INPUT (V) Ra (kΩ) Rb (kΩ) Rc (kΩ) GAIN
±5 10 9.76 4.22 0.23
5 100 97.6 576 0.46
20 100 14.3 143 0.115
40 100 6.65 71.5 0.0575