Figure 4-3 shows the platform for the low-side brake IGBT gate driving tests. A C2000™ LaunchPad™ of LAUNCHXL-F28379D has been used as the system controller to generate a series of PWM pulses of 10 kHz with 10% duty cycle, or 10 μs ON time in each 100 μs period, to drive a low-side IGBT. The LaunchPad also generates a high output for the LATCH input of the AMC23C11 and monitors the nDESAT signal with a GPIO.

To test on an OCP or SCP situation, a 600-V 10-A discrete IGBT is used and two 1.5-Ω 3-W resistors are put in parallel to emulate a brake resistor. The resistors are inserted between the IGBT collector and the 350-V DC+ rail. The test result is show in Figure 4-4.

In this test, once the IGBT was turned on (t = 0 s), the collector current began to rise up and soon got saturated at around 90 A (t = 480 ns). According to the tested IGBT’s data sheet, when the collector current reaches 70 A, the V_CE will increase to the 8 V trigger level set for the circuit. DESAT was detected by the isolated comparator AMC23C11 after a blanking time of around 780 ns. Then, after an internal delay of 240 ns typically, the AMC23C11’s OUT shifted to low (t = 1.04 μs) and latched (when LATCH is set to high). After another delay by the deglitch filter for nDESAT of about 340 ns, the NAND gate SN74LVC1G00's output shifted to high and cut off the USS23513's input current, made the gate driver pulling the VGATE down (t = 1.44 μs). The DESAT reaction time, from IGBT's the current reached 70 A to the point the current began to drop after the GATE turned to low, was only about 1.16 μs.