SBOA435A August   2020  – August 2020 OPA388-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
  6. 5Revision History

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the OPA388-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
Class Failure Effects
A Potential device damage that affects functionality
B No device damage, but loss of functionality
C No device damage, but performance degradation
D No device damage, no impact to functionality or performance

Figure 4-1 shows the OPA388-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the OPA388-Q1 data sheet.

GUID-4F640808-BF6E-46F5-98A8-6B3A84397906-low.gifFigure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • 'Short circuit to Power' means short to V+

  • 'Short circuit to GND or Ground' means short to V‒
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class

OUT

1

Depending on circuit configuration, device will likely be forced into short circuit condition with OUT voltage ultimately forced to V‒ voltage. Prolonged exposure to short circuit conditions could result in long term reliability issues.

A

+IN

3

Device common‒mode tied to negative rail. Depending on circuit configuration, output will likely not respond due to the device being put in an invalid common‒mode condition.

C

‒IN

4

Negative feedback not present to device. Depending on circuit configuration, output will most likely move to negative supply.

B

V+

5

Op‒Amp supplies will be shorted together leaving V+ pin at some voltage between V+ and V‒ sources (depending on source impedance).

A

Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class

OUT

1

No negative feedback or ability for OUT to drive application.

B

V‒

2

Negative supply left floating. Op‒Amp will cease to function as no current can source/sink to the device.

B

+IN

3

Input common‒mode left floating. Op‒Amp will not be provided with common‒mode bias, device output will likely end up at positive or negative rail. +IN pin voltage will likely end up at positive or negative rail due to leakage on ESD diodes.

B

‒IN

4

Inverting pin of Op‒Amp left floating. Negative feedback will not be provided to device, likely resulting in device output moving between positive and negative rail. ‒IN pin voltage will likely end up at positive or negative rail due to leakage on ESD diodes.

B

V+

5

Positive supply left floating. Op‒Amp will cease to function as no current can source/sink to the device.

A

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class

OUT

1

V‒

Depending on circuit configuration, device will likely be forced into short circuit condition with OUT voltage ultimately forced to V‒ voltage. Prolonged exposure to short circuit conditions could result in long term reliability issues.

A

V‒

2

+IN

Device common‒mode tied to negative rail. Depending on circuit configuration, output will likely not respond due to the device being put in an invalid common‒mode condition.

C

+IN

3

+IN

Both inputs will be tied together. Depending on the offset of the device, this will likely move the output voltage near mid supply.

D

‒IN

4

V+

Negative feedback not present to device. Depending on non‒inverting input voltage and circuit configuration, output will most likely move to negative supply.

B

V+

5

OUT

Depending on circuit configuration, device will likely be forced into short circuit condition with V+ voltage ultimately forced to OUT voltage. Prolonged exposure to short circuit conditions could result in long term reliability issues.

A

Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class

OUT

1

Depending on circuit configuration, device will likely be forced into short circuit condition with OUT voltage ultimately forced to V+ voltage. Prolonged exposure to short circuit conditions could result in long term reliability issues.

A

V‒

2

Op‒Amp supplies will be shorted together leaving V‒ pin at some voltage between V‒ and V+ sources (depending on source impedance).

A

+IN

3

Depending on circuit configuration, application will likely not function due to the device common‒mode being connected to +IN.

B

‒IN

4

Negative feedback not present to device. Depending on non‒inverting input voltage and circuit configuration, output will most likely move to negative supply.

B