SFFS383 September   2022 TPS7A52-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 VQFN Package
    2. 2.2 VQFNP Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 VQFN Package
    2. 4.2 VQFNP Package

VQFNP Package

Figure 4-2 shows the TPS7A52-Q1 pin diagram for the VQFNP package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7A52-Q1 data sheet.

Figure 4-2 Pin Diagram (VQFNP Package)
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
NC 2 No effect. Normal operation. D
FB 3 Output voltage is the input voltage minus the dropout voltage because the error amplifier drives the pass transistor gate to the rail. B
PG 4 PG always indicates that the output is not at the target level. B
DNC 5 No effect. Normal operation. D
NC 6 No effect. Normal operation. D
NC 7 No effect. Normal operation. D
GND 8 No effect. Normal operation. D
NC 9 No effect. Normal operation. D
NC 10 No effect. Normal operation. D
NC 11 No effect. Normal operation. D
BIAS 12 VBIAS does not provide biasing, any benefits associated with using a separate VBIAS are no longer present. C
NR/SS 13 The internal reference cannot start. The device cannot turn on. B
EN 14 The device is disabled, resulting in no output voltage. B
IN 15 There is no power to the device, resulting in no output voltage. B
IN 16 There is no power to the device, resulting in no output voltage. B
IN 17 There is no power to the device, resulting in no output voltage. B
GND 18 No effect. Normal operation. D
OUT 19 Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
OUT 20 Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 Device parasitics are increased and transient performance is degraded. C
NC 2 No effect. Normal operation. D
FB 3 The error amplifier input is not connected. Output voltage is indeterminate. B
PG 4 PG functionality is lost. B
DNC 5 No effect. Normal operation. D
NC 6 No effect. Normal operation. D
NC 7 No effect. Normal operation. D
GND 8 Device biasing has no current path. The device is not operational and does not regulate. B
NC 9 No effect. Normal operation. D
NC 10 No effect. Normal operation. D
NC 11 No effect. Normal operation. D
BIAS 12 VBIAS does not provide biasing, any benefits associated with using a separate VBIAS are no longer present. C
NR/SS 13 The device starts up with default timing. Any noise-reduction benefits are lost. C
EN 14 The enable circuit is in an unknown state. The device can be enabled or disabled. B
IN 15 Device parasitics are increased and transient performance is degraded. C
IN 16 Device parasitics are increased and transient performance is degraded. C
IN 17 Device parasitics are increased and transient performance is degraded. C
GND 18 The charge pump has no current path. The device regulates but performance is degraded. C
OUT 19 Device parasitics are increased and transient performance is degraded. C
OUT 20 Device parasitics are increased and transient performance is degraded. C
Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
OUT 1 NC (pin 2) No effect. Normal operation. D
NC 2 FB (pin 3) No effect. Normal operation. D
FB 3 PG (pin 4) PG functionality is lost. The output voltage set by the feedback resistors is incorrect. B
PG 4 DNC (pin 5) The low-dropout regulator (LDO) can possibly not work properly because the PG signal can create errors during LDO start-up. B
DNC 5 NC (pin 6) No effect. Normal operation. D
NC 6 NC (pin 7) No effect. Normal operation. D
NC 7 GND (pin 8) No effect. Normal operation. D
GND 8 NC (pin 9) No effect. Normal operation. D
NC 9 NC (pin 10) No effect. Normal operation. D
NC 10 NC (pin 11) No effect. Normal operation. D
NC 11 BIAS (pin 12) No effect. Normal operation. D
BIAS 12 NR/SS (pin 13) VBIAS can potentially violate the absolute maximum rating on the NR/SS pin and cause damage. If this condition is not met, the internal reference cannot get to the target voltage and the output voltage is incorrect. A
NR/SS 13 EN (pin 14) The output voltage is incorrect. B
EN 14 IN (pin 15) The device is always enabled when the input is powered. B
IN 15 IN (pin 16) No effect. Normal operation. D
IN 16 IN (pin 17) No effect. Normal operation. D
IN 17 GND (pin 18) No power to the device, resulting in no output voltage. B
GND 18 OUT (pin 19) Regulation is not possible, the device operates at current limit. The device can cycle in and out of thermal shutdown. B
OUT 19 OUT (pin 20) No effect. Normal operation. D
OUT 20 OUT (pin 1) No effect. Normal operation. D
Table 4-9 Pin FMA for Device Pins Short-Circuited to VIN
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
OUT 1 Regulation is not possible. B
NC 2 No effect. Normal operation. D
FB 3 The FB absolute maximum rating (3.6 V max) can be violated, damaging the device. If VIN < 3.6 V and if there is any loading on the device, the output is approximately 0 V. If there is no load on the device, the output is equal to VIN. A
PG 4 PG functionality is lost. B
DNC 5 The LDO can possibly not work properly because the input signal can create errors during LDO start-up. B
NC 6 No effect. Normal operation. D
NC 7 No effect. Normal operation. D
GND 8 No output voltage. System performance depends on the upstream current limiting. B
NC 9 No effect. Normal operation. D
NC 10 No effect. Normal operation. D
NC 11 No effect. Normal operation. D
BIAS 12 Any benefits of using a separate supply for VBIAS are lost. If VIN is shorted to VBIAS, the supplies can destroy each other. C
NR/SS 13 The absolute maximum rating for the NR/SS pin can be violated, damaging the pin. If the absolute maximum rating is not violated, the output voltage is equal to the input voltage minus the dropout voltage. A
EN 14 The device is always enabled when the input is powered. B
IN 15 No effect. Normal operation. D
IN 16 No effect. Normal operation. D
IN 17 No effect. Normal operation. D
GND 18 No output voltage. System performance depends on the upstream current limiting. B
OUT 19 Regulation is not possible. B
OUT 20 Regulation is not possible. B