4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS61033-Q1 and TPS610333-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

• Pin short-circuited to Ground (see Table 4-2)
• Pin open-circuited (see Table 4-3)
• Pin short-circuited to an adjacent pin (see Table 4-4)
• Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Figure 4-1 shows the TPS61033-Q1 and TPS610333-Q1 pin diagrams. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS61033-Q1 5.5-V 5.5-A 2.4-MHz Fully-Integrated Synchronous Boost Converter, with Output Discharge Function data sheets.

Figure 4-1 TPS61033-Q1 and TPS610333-Q1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

• Device used within the Recommended Operating Conditions and the Absolute Maximum Ratings found in the TPS61033-Q1 5.5-V 5.5-A 2.4-MHz Fully-Integrated Synchronous Boost Converter, with Output Discharge Function data sheet.

• Configuration as shown in the Application and Implementation found in the TPS61033-Q1 5.5-V 5.5-A 2.4-MHz Fully-Integrated Synchronous Boost Converter, with Output Discharge Function data sheet.