SLAAE21 April   2021 DAC43701 , DAC43701-Q1 , DAC53701 , DAC53701-Q1

 

  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Example
  7.   Design Featured Devices
  8.   Design References

Register Settings

Register Settings for the DAC53701 GPI to PWM
Register AddressRegister NameSettingDescription

0xD1

GENERAL_CONFIG

0x0A20

[15:14] 0b00: Selects triangular waveform to be generated by the continuous waveform generator (CWG)
[13] 0b0: Write 0b1 to lock device. Unlock by writing 0b0101 to DEVICE_UNLOCK_CODE field in the PROTECT register
[12] 0b0: Write 0b1 to enable PMBus mode
[11:9] 0b101: Selects code step of 8 LSB used for programmable slew rate control
[8:5] 0b0001: Selects slew rate of 32µs per code step used for programmable slew rate control
[4:3] 0b00: Powers up the device output
[2] 0b0: Disables the internal reference
[1:0] 0b00: Selects the gain to be applied to the internal reference

0xD2

CONFIG2

0x0800

[15:14] 0b00: Configures the device I2C address
[13:11] 0b001: Configures the GPI pin as Power-Up, Down (10kΩ) trigger
[10] 0b0: Write 0b1 to generate a high priority medical alarm
[9] 0b0: Write 0b1 to generate a medium priority medical alarm
[8] 0b0: Write 0b1 to generate a low priority medical alarm
[7:6] 0b00: Always write 0b00
[5:4] 0b00: Selects the interburst time for medical alarms
[3:2] 0b00: Selects the pulse off time for medical alarms
[1:0] 0b00: Selects the pulse on time for medical alarms

0xD3

TRIGGER

0x0510

[15:12] 0b0000: Write 0b0101 to unlock the device
[11] 0b0: Don't care
[10] 0b1: Write 0b1 to enable the GPI pin
[9] 0b0: Write 0b1 to load all registers with factory reset values
[8] 0b1: Write 0b1 to start continuous waveform generation output
[7] 0b0: Write 1 to initiate PMBus MARGIN_HIGH command
[6] 0b0: Write 1 to initiate PMBus MARGIN_LOW command
[5] 0b0: Write 0b1 to reload applicable registers with existing NVM settings
[4] 0b1: Write 0b1 to store applicable register settings to the NVM
[3:0] 0b0000: Write 0b1010 to reset registers with existing NVM settings or default settings
0x25DAC_MARGIN_HIGH0x0CCC[15:12] 0b0000: Don't care
[11:2] 0x333: 10-bit data updates the MARGIN_HIGH code
[1:0] 0b00: Don't care
0x26DAC_MARGIN_LOW0x0334[15:12] 0b0000: Don't care
[11:2] 0xCD: 10-bit data updates the MARGIN_LOW code
[1:0] 0b00: Don't care