SLAAE23 June   2021 DAC43204 , DAC53004 , DAC53204 , DAC63204


  1.   Design Objective
  2.   Design Description
  3.   Design Notes
  4.   Design Simulations
    1.     Transient Simulation Results
  5.   Register Settings
  6.   Pseudo Code Example
  7.   Design Featured Devices
  8.   Design References

Transient Simulation Results

The simulation shows the SMPS output (VOUT) responding to the changes on the DAC43204 output (DAC_OUT). When DAC_OUT is at IDAC,MAX the SMPS VOUT goes to margin high, or 3.63V. When DAC_OUT is at IDAC,MIN the SMPS VOUT goes to margin low, or 2.97V.