SLAAE47A May   2022  – August 2022 DAC11001A , DAC11001B

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2DAC Error Sources
    1. 2.1 Offset Error
    2. 2.2 Gain Error
    3. 2.3 Integral Non Linearity (INL)
    4. 2.4 Noise Sources
  5. 3Error Sources from Reference
    1. 3.1 Initial Accuracy
    2. 3.2 Temperature Drift
    3. 3.3 Load Regulation Error
    4. 3.4 Line Regulation Error
    5. 3.5 0.1 - 10 Hz Peak-to-Peak Noise
    6. 3.6 Example Using REF7025
  6. 4Error Sources from Inverting and Non-Inverting Gain Stage
    1. 4.1 Input Offset Voltage Error
    2. 4.2 Input Offset Voltage Drift Error
    3. 4.3 Power Supply Rejection Ratio (PSRR) Error
    4. 4.4 Open Loop Gain Error
    5. 4.5 Resistor Tolerance Error
  7. 5Example Calculation using DAC11001A
  8. 6Error Summary
  9. 7References
  10. 8Revision History

2 DAC Error Sources

Static errors, errors that affect the accuracy of the converter when it is converting static (dc) signals, can be described using four terms. These terms are offset error, gain error, integral nonlinearity and differential nonlinearity. Each term can be expressed in least significant bit (LSB) units or as a percentage of the full-scale range (FSR). For example, an error of ½ LSB for an 8-bit converter corresponds to 0.2% FSR. Figure 2-1 shows DAC ideal and actual transfer function. All the error sources and calculations in this document is expressed in parts-per-million (ppm).

Figure 2-1 DAC Ideal and Actual Transfer Function