SLAZ498H January   2013  – March 2021 MSP430G2544

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      DA38
      2.      RHA40
      3.      YFF49
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  BCL16
    3. 6.3  CPU19
    4. 6.4  CPU45
    5. 6.5  EEM20
    6. 6.6  FLASH24
    7. 6.7  FLASH27
    8. 6.8  FLASH36
    9. 6.9  PORT10
    10. 6.10 SYS15
    11. 6.11 TA12
    12. 6.12 TA16
    13. 6.13 TA21
    14. 6.14 TAB22
    15. 6.15 TB2
    16. 6.16 TB16
    17. 6.17 TB24
    18. 6.18 USCI20
    19. 6.19 USCI21
    20. 6.20 USCI22
    21. 6.21 USCI23
    22. 6.22 USCI24
    23. 6.23 USCI25
    24. 6.24 USCI26
    25. 6.25 USCI27
    26. 6.26 USCI30
    27. 6.27 USCI34
    28. 6.28 USCI35
    29. 6.29 USCI40
    30. 6.30 XOSC5
  7. 7Revision History

USCI40

USCI Module

Category

Functional

Function

SPI Slave Transmit with clock phase select = 1

Description

In SPI slave mode with clock phase select set to 1 (UCAxCTLW0.UCCKPH=1), after the first TX byte, all following bytes are shifted by one bit with shift direction dependent on UCMSB. This is due to the internal shift register getting pre-loaded asynchronously when writing to the USCIA TXBUF register. TX data in the internal buffer is shifted by one bit after the RX data is received.

Workaround

Reinitialize TXBUF before using SPI and after each transmission.
If transmit data needs to be repeated with the next transmission, then write back previously read value:


UCAxTXBUF = UCAxTXBUF;