SLIU003A October   2009  – September 2022 TPS55065-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Setup
    1. 2.1 Input/Output Connector Description
    2. 2.2 Setup
    3. 2.3 Operation
  4. 3Board Layout
  5. 4Schematic
  6. 5Revision History

Board Layout

Figure 3-1, Figure 3-2, Figure 3-3, and Figure 3-4 show the board layout for the TPS55065EVM PWB. The EVM offers resistors, capacitors, and jumpers to program the switch pin slew rate and regulator turn-on Delay. Jumpers are also provided to enable the device and to enable the low-power mode option.

The TPS55065 offers high efficiency but does dissipate power. The PowerPAD™ package offers an exposed thermal pad to enhance thermal performance. This must be soldered to the copper landing on the PCB for optimal performance. The PCB provides 1-oz copper planes on the top and bottom to dissipate heat.

GUID-404DDAD1-12BD-4574-B4E9-6CB8D10822F6-low.gifFigure 3-1 Top Assembly Layer
GUID-DF4AD047-06AF-43CB-A5EA-9D2FF29A7B4F-low.gifFigure 3-2 Bottom Assembly Layer
GUID-5067BAD0-E70A-4E40-A074-0B55425F89B1-low.gifFigure 3-3 Top Layer Routing
GUID-BFDB8AC1-BE56-411F-8F2B-D2DFE5B6AA9A-low.gifFigure 3-4 Bottom Layer Routing