5 PCB Layout for Thermal Performance

In the E1 version, where both blind vias and through-hole thermal vias are used, best heat exchange is achieved between the package and the PCB. The device temperature is much lower in E1 compared to the other versions. Hence, it can be regarded as a performance optimized solution. On the contrary, blind vias are difficult to manufacture and this increases the overall cost of the PCB. In the E2 version, thermal vias are not used, heat is not dissipated effectively from the board and the device has very high temperature. But the overall cost is much lower than the other versions and hence it is a cost optimized solution.

In the E3 version, the device temperature is lower than the E2 version and almost similar to E1 version. This means, there is effective heat dissipation and the same thermal performance is achieved by using through-hole micro vias. Blind vias could be beneficial but in this case, it is not necessary. By avoiding unnecessary blind vias we can save cost and at the same time obtain a highly optimized design. Therefore, it is both performance and cost optimized.

Adding thermal vias helps reducing the overall device temperature and improves efficiency results. It is also manifest that after adding an optimum number of vias, using more thermal vias will not necessarily offer an additional reduction of the same magnitude.

However, using vias directly on the switch node can propagate fast switching signals through the PCB and induce high switching noise which, in noise-sensitive applications, could disturb other signals on the board. For more noise-sensitive applications, the TPS62869EVM layout shows how to achieve good thermal results without using micro vias and thermal vias at the switch node.