SLUAAP7 January   2024 BQ76905 , BQ76907

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Cell Balancing Circuit Considerations
    1. 2.1 Internal Cell-Balancing Circuit Design
    2. 2.2 External Cell-Balancing Circuit Design Using N-Channel FETs
    3. 2.3 External Cell-Balancing Circuit Design Using BJTs
  6. 3Considerations for a Host-Balancing Algorithm
  7. 4Timing Information
  8. 5Debugging Common Issues With Cell Balancing
    1. 5.1 Using a Resistor Divider as a Cell Simulator
    2. 5.2 Cell Balancing Troubleshooting
  9. 6Summary
  10. 7References

1 Introduction

Battery cells are typically matched during the manufacturing of battery packs. Over time, an imbalance in the state of charge may develop between cells and reduce the overall capacity of the pack. Having a battery monitor with the capability of cell balancing allows longer battery life for the pack.

The BQ7690x supports passive cell balancing by bypassing the current of selected cells during charging or at rest, using the integrated or external bypass switches. For external bypass switches, the user could select between FET or BJT transistors. Balancing must be initiated and controlled manually from a host processor.

While balancing is active, there will be a current flowing into the cell input pins. In order to measure accurately, cell balancing needs to be disabled temporary while measuring the individual cells. Therefore, the timing for measurement of cell voltages and evaluation of cell voltage protections by the device is modified during balancing. The internal balancing FETs are disabled temporarily during each ADSCAN while the cell voltages and shared slot are being measured while cell balancing is active on a cell.