SLUUCQ1 March   2023 TPS546D24S

 

  1.   Stacking TPS546D24S Two-Phase Evaluation Module
  2.   Trademarks
  3. Description
    1. 1.1 Before You Begin
    2. 1.2 Typical Applications
    3. 1.3 Features
  4. Electrical Performance Specifications
  5. Schematic
  6. Test Setup
    1. 4.1 Test and Configuration Software
      1. 4.1.1 Description
      2. 4.1.2 Features
    2. 4.2 Test Equipment
      1. 4.2.1 Voltage Source
      2. 4.2.2 Multimeters
      3. 4.2.3 Output Load:
      4. 4.2.4 Oscilloscope
      5. 4.2.5 Fan:
      6. 4.2.6 USB-to-GPIO Interface Adapter:
      7. 4.2.7 Recommended Wire Gauge
    3. 4.3 Tip and Barrel Measurement
    4. 4.4 List of Test Points, Jumpers, and Connectors
    5. 4.5 Evaluating Single Phase Operation
    6. 4.6 Evaluating Split Rail Input
    7. 4.7 Configuring EVM to Overdrive VDD5
  7. EVM Configuration Using the Fusion GUI
    1. 5.1 Configuration Procedure
  8. Test Procedure
    1. 6.1 Line and Load Regulation and Efficiency Measurement Procedure
    2. 6.2 Efficiency Measurement Test Points
    3. 6.3 Control Loop Gain and Phase Measurement Procedure
  9. Performance Data and Typical Characteristic Curves
    1. 7.1  Efficiency
    2. 7.2  Load and Line Regulation (Measured Between TP22 and TP25)
    3. 7.3  Transient Response
    4. 7.4  Control Loop Bode Plot
    5. 7.5  Output Ripple
    6. 7.6  Power MOSFET Drain-Source Voltage
    7. 7.7  Control On
    8. 7.8  Control Off
    9. 7.9  Control On With Pre-biased Output
    10. 7.10 Current Sharing Between Two Phases
    11. 7.11 Thermal Image
  10. EVM Assembly Drawing and PCB Layout
  11. Bill of Materials
  12. 10Using the Fusion GUI
    1. 10.1  Opening the Fusion GUI
    2. 10.2  General Settings
    3. 10.3  Changing ON_OFF_CONFIG
    4. 10.4  Pop-up for Some Commands While Conversion is Enabled
    5. 10.5  SMBALERT# Mask
    6. 10.6  Device Info
    7. 10.7  Phase Commands
    8. 10.8  All Config
    9. 10.9  Pin Strapping
    10. 10.10 Monitor
    11. 10.11 Status

Efficiency Measurement Test Points

To evaluate the efficiency of the power train (device and inductor), make sure to measure the voltages at the correct location. This action is necessary because otherwise the measurements include losses that are not related to the power train itself. Losses incurred by the voltage drop in the copper traces and in the input and output connectors are not related to the efficiency of the power train, which must not be included in efficiency measurements.

Input current can be measured at any point in the input wires, and output current can be measured anywhere in the output wires of the output being measured.

Table 6-1 shows the measurement points for input voltage and output voltage. VIN and VOUT are measured to calculate the efficiency. Using these measurement points results in efficiency measurements that excluded losses due to the wires and connectors.

Table 6-1 Test Points for Efficiency Measurements
Test PointNode NameDescriptionComment
TP12PVINInput voltage measurement point for VIN+The pair of test points are connected to the PVIN/PGND pins of U1_P1. The voltage drop between input terminal to the device pins is included for efficiency measurement.
TP15PGNDInput voltage measurement point for VIN– (GND)
TP22VOUTOutput voltage measurement point for VOUT+The pair of test points are connected near the output terminals. The voltage drop from the output point of the inductor to the output terminals is included for efficiency measurement.
TP25GNDOutput voltage measurement point for VOUT– (GND)

For more accurate efficiency measurements of the power train, remove the voltage drop between the power train and the terminals from the measurement. Using the test points in Table 6-2 reduces these losses. To average the voltages at each test point so that only one meter is needed for PVIN and VOUT, add some resistance between the each test point and the meter. For the measurements taken in this user's guide, a 1.5-kΩ resistor was added in series with each test point. Using these test points reduced the measured power loss at 80 A load by approximately 0.5 W. This power is lost in the copper traces of the PCB.

Table 6-2 Test Points for Better Efficiency Measurements
Test PointNode NameDescriptionComment
TP1_P1PVIN_P1Input voltage measurement point for VIN+This pair of test points are connected to PVIN and PGND near the pins of U1_P1
TP4_P1GND_P1Input voltage measurement point for VIN– (PGND)
TP1_P2PVIN_P2Input voltage measurement point for VIN+This pair of test points are connected to PVIN and PGND near the pins of U1_P2
TP4_P2GND_P2Input voltage measurement point for VIN– (PGND)
TP13VOUT_P1Output voltage measurement point for VOUT+This pair of test points are connected to VOUT and GND near the output inductor for U1_P1
TP16GND_P1Output voltage measurement point for VOUT– (GND)
TP26VOUT_P2Output voltage measurement point for VOUT+This pair of test points are connected to VOUT and GND near the output inductor for U1_P2
TP30GND_P2Output voltage measurement point for VOUT– (GND)