SLVAE41A February 2020 – November 2020 TPS54388C-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS54388C-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to Ground (see Table 4-2)
Pin open-circuited (see Table 4-3)
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to VIN (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality
B	No device damage, but loss of functionality
C	No device damage, but performance degradation
D	No device damage, no impact to functionality or performance

Figure 4-1 shows the TPS54388C-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS54388C-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Assumption the device is running in the typical application, please refer to the 'Simplified Schematics' on the first page in the TPS54388C-Q1 data sheet.

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
VIN	1	Device does not power up, no output voltage	B
VIN	2	Device does not power up, no output voltage	B
GND	3	Normal operation	D
GND	4	Normal operation	D
AGND	5	Normal operation	D
VSENSE	6	100% duty cycle operation, no regulated output voltage. Output voltage will follow the input voltage and go low periodically during refresh cycles of the bootstrap capacitor	B
COMP	7	0% duty cycle operation, no output voltage	B
RT/CLK	8	Device is not switching, no output voltage	B
SS/TR	9	Device does not turn on, no output voltage	B
PH	10	Potential device damage	A
PH	11	Potential device damage	A
PH	12	Potential device damage	A
BOOT	13	Damage the V_IN to BOOT path	A
PWRGD	14	PWRGD signal is always low, output voltage is regulated as programmed	B
EN	15	Device is disabled, no output voltage	B
VIN	16	Device does not power up, no output voltage	B

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
VIN	1	Normal operation, pins 2 and 16 are still connected	C
VIN	2	Normal operation, pins 1 and 16 are still connected	C
GND	3	Normal operation, pin 4 is still connected	C
GND	4	Normal operation, pin 3 is still connected	C
AGND	5	Normal operation, potential jitter issues	C
VSENSE	6	100% or 0% duty cycle operation, no regulated output voltage. Output voltage will either follow the input voltage and go low periodically during refresh cycles of the bootstrap capacitor or no output voltage	B
COMP	7	No loop compensation, output voltage can oscillate	B
RT/CLK	8	Very low switching frequency operation	B
SS/TR	9	No softstart function, output voltage is regulated as programmed	C
PH	10	Normal operation, pins 11 and 12 are still connected	C
PH	11	Normal operation, pins 10 and 12 are still connected	C
PH	12	Normal operation, pins 10 and 11 are still connected	C
BOOT	13	Boot capacitor is not charged, high side switch cannot be turned on, no output voltage	B
PWRGD	14	PWRGD signal is not available, output voltage is regulated as programmed	B
EN	15	EN pin is internally pulled up, device cannot be disabled, output voltage is regulated as programmed	B
VIN	16	Normal operation, pins 1 and 2 are still connected	C

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No.	Shorted to	Description of Potential Failure Effect(s)	Failure Effect Class
VIN	1	2	Normal operation	D
VIN	2	3	Device does not power up, no output voltage	B
GND	3	4	Normal operation	D
GND	4	5	Normal operation	D
AGND	5	6	100% duty cycle operation, no regulated output voltage. Output voltage will follow the input voltage and go low periodically during refresh cycles of the bootstrap capacitor	B
VSENSE	6	7	No loop compensation, can cause output voltage oscillating. Oscillation frequency cannot be predicted.	B
COMP	7	8	Device will not start properly, no output voltage or too low output voltage	B
RT/CLK	8	9	tracking driven by RT/CLK voltage, low voltage at the output	B
SS/TR	9	10	Potential device damage, no output voltage	A
PH	10	11	Normal operation	D
PH	11	12	Normal operation	D
PH	12	13	Boot capacitor is not charged, high side switch cannot be turned on, no output voltage	B
BOOT	13	14	Potential device damage	A
PWRGD	14	15	Potential device damage	A
EN	15	16	Device cannot be disabled, output voltage is regulated as programmed	C
VIN	16	1	Normal operation	D

Table 4-5 Pin FMA for Device Pins Short-Circuited to VIN

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
VIN	1	Normal operation	D
VIN	2	Normal operation	D
GND	3	Device does not power up, no output voltage	B
GND	4	Device does not power up, no output voltage	B
AGND	5	Device does not power up, no output voltage	B
VSENSE	6	Potential device damage	A
COMP	7	Potential device damage	A
RT/CLK	8	Device is not switching, no output voltage	B
SS/TR	9	Potential device damage	A
PH	10	Potential device damage	A
PH	11	Potential device damage	A
PH	12	Potential device damage	A
BOOT	13	Boot capacitor is not charged, high side switch cannot be turned on, no output voltage	B
PWRGD	14	Potential device damage	A
EN	15	Device cannot be disabled, output voltage is regulated as programmed	C
VIN	16	Normal operation	D