SLVAEV4 June   2020 DRV8876-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 HTSSOP Package

Overview

This document contains information for DRV8876-Q1 to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

DRV8876-Q1 was developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

Figure 1-1 shows the functional block diagram for reference.

GUID-F968A28E-7376-441C-A624-56905323F04A-low.gifFigure 1-1 DRV8876-Q1 Device Block Diagram - HW variant