SLVS496D SEPTEMBER   2003  – August 2016 TPS65100 , TPS65101 , TPS65105

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Options
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Dissipation Ratings
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Main Boost Converter
      2. 8.3.2  VCOM Buffer
      3. 8.3.3  Enable and Power-On Sequencing
      4. 8.3.4  Positive Charge Pump
      5. 8.3.5  Negative Charge Pump
      6. 8.3.6  Linear Regulator Controller
      7. 8.3.7  Soft Start
      8. 8.3.8  Fault Protection
      9. 8.3.9  Thermal Shutdown
      10. 8.3.10 Linear Regulator Controller
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Disable
      2. 8.4.2 Fault Mode
        1. 8.4.2.1 Overvoltage Protection
        2. 8.4.2.2 Short-Circuit Protection
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Applications
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Boost Converter Design Procedure
          1. 9.2.2.1.1 Inductor Selection
          2. 9.2.2.1.2 Output Capacitor Selection
          3. 9.2.2.1.3 Input Capacitor Selection
          4. 9.2.2.1.4 Rectifier Diode Selection
          5. 9.2.2.1.5 Converter Loop Design and Stability
          6. 9.2.2.1.6 Design Procedure Quick Steps
          7. 9.2.2.1.7 Setting the Output Voltage and Selecting the Feedforward Capacitor
        2. 9.2.2.2 Negative Charge Pump
        3. 9.2.2.3 Positive Charge Pump
        4. 9.2.2.4 VCOM Buffer
      3. 9.2.3 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Notebook Supply
      2. 9.3.2 Monitor Supply
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Performance
  12. 12Device and Documentation Support
    1. 12.1 Device Support
      1. 12.1.1 Third-Party Products Disclaimer
    2. 12.2 Documentation Support
      1. 12.2.1 Related Documentation
    3. 12.3 Related Links
    4. 12.4 Receiving Notification of Documentation Updates
    5. 12.5 Community Resource
    6. 12.6 Trademarks
    7. 12.7 Electrostatic Discharge Caution
    8. 12.8 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

11 Layout

11.1 Layout Guidelines

For all switching power supplies, the layout is an important step in the design, especially at high-peak currents and switching frequencies. If the layout is not carefully designed, the regulator might show stability and EMI problems. Therefore, the traces carrying high-switching currents should be routed first using wide and short traces. The input filter capacitor should be placed as close as possible to the input pin VIN of the IC. TI recommends the following PCB layout guidelines for the TPS6510x devices:

  1. Connect PGND and AGND together on the same ground plane
  2. Connect all capacitor grounds and PGND together on a common ground plane.
  3. Place the input capacitor as close as possible to the input pin of the IC.
  4. Place the rectifier diode as close as possible to the IC
  5. Route first the traces carrying high-switching current with wide and short traces
  6. Isolate analog signal paths from power paths.
  7. If vias are necessary, try to use more than one in parallel to decrease parasitics, especially for power traces.
  8. Solder the thermal pad to the PCB for good thermal performance.

11.2 Layout Example

TPS65100 TPS65101 TPS65105 Layout_01_SLVS496.gif Figure 21. TPS6510x Layout Example

11.3 Thermal Performance

An influential component of thermal performance of a package is board design. To take full advantage of the heat dissipation abilities of the PowerPAD or VQFN package with exposed thermal die, a board that acts similar to a heat sink and allows the use of an exposed (and solderable) deep downset pad should be used. For further information, see the Texas Instruments application notes PowerPAD Thermally Enhanced Package and PowerPAD Made Easy. For the VQFN package, see the QFN/SON PCB Attachement application report. Especially for the VQFN package it is required to solder down the Thermal Pad to achieve the required thermal resistance.