SLVU151A April   2013  – August 2021 TPS54350 , TPS54550

 

  1.   Trademarks
  2. 1Background
  3. 2Performance Specification Summary
  4. 3Modifications
    1. 3.1 Output Voltage Set Point
    2. 3.2 Input Voltage Range
  5. 4Test Setup and Results
    1. 4.1 Input / Output Connections
    2. 4.2 Efficiency
    3. 4.3 Output Voltage Regulation
    4. 4.4 Load Transients
    5. 4.5 Loop Characteristics
    6. 4.6 Output Voltage Ripple
    7. 4.7 Input Voltage Ripple
    8. 4.8 Powering Up
  6. 5Board Layout
    1. 5.1 Layout
  7. 6Schematic and Bill of Materials
    1. 6.1 Schematic
    2. 6.2 Bill of Materials
  8. 7Revision History

4.1 Input / Output Connections

The TPS54550EVM-158 is provided with input/output connectors and test points as shown in Table 4-1. Connect a power supply capable of supplying 3 A to J1 through a pair of 20 AWG wires. The load should be connected to J3 through a pair of 20 AWG wires. The maximum load current capability should be 5 A. Wire lengths must be minimized to reduce losses in the wires. Test-point TP1 provides a place to monitor the VIN input voltages with TP2 providing a convenient ground reference. TP3 is used to monitor the output voltage with TP4 as the ground reference.

Table 4-1 EVM Connectors and Test Points
REFERENCE DESIGNATORFUNCTION
J1VIN, 12 V nominal, 6 V to 17 V
J2OUT, 5 V at 5 A maximum
J32-pin header for bi-directional synchronization signal.
J42-pin header for enable. Connect EN to ground to disable, open to enable.
TP1VIN test point at VIN connector
TP2GND test point at VIN
TP3Output voltage test point at OUT connector
TP4GND test point at OUT connector
TP5Test point between voltage divider network and R3. Used for loop response measurements.
TP6Test point on power-good pullup resistor. Tie to 3.3 V or 5 V if power-good signal is used.
TP7Test point for power good.
TP8Test point for external UVLO.
TP9Test point for timing resistor.