SLVUAV5B March   2017  – February 2022 TPSM846C23

 

  1.   Trademarks
  2. 1Description
  3. 2Getting Started
  4. 3Test Point Descriptions
  5. 4Operation Notes
  6. 5Performance Data
  7. 6Schematic
  8. 7Bill of Material
  9. 8PCB Layout
  10. 9Revision History

Getting Started

Figure 2-1 highlights the user interface items associated with the EVM. The polarized input power terminal block (TB1) is used for connection to the host input supply. TB2 allows two terminals for VOUT and TB3 allows two terminals for PGND for connection to the load. These terminal blocks can except up to 10 AWG wire.

GUID-9B23FBFA-EBB5-49B4-9954-1DA3645CF4FB-low.gif Figure 2-1 EVM User Interface

The VIN Monitor (VIN and PGND) test points and VOUT Monitor (VS+ and VS–) test points located near the input terminal block and the output terminal blocks are intended to be used as voltage monitoring points where voltmeters can be connected to measure the input and output voltages. Do not use these VIN and VOUT monitoring test points as the input supply or output load connection points. The PCB traces connecting to these test points are not designed to support high currents.

The VIN Scope (J1) and VOUT Scope (J2) test points can be used to monitor VIN and VOUT waveforms with an oscilloscope. These test points are intended for use with un-hooded scope probes outfitted with a low-inductance ground lead (ground spring) mounted to the scope probe barrel. The two sockets of each test point are on 0.1 inch centers. The scope probe tip should be inserted into the socket labeled VIN or VOUT, and the scope ground lead should be inserted into the hole of the socket labeled PGND.

The test points located along the bottom of the EVM are made available to test the features of the device. Any external connections made to these test points should be referenced to one of the AGND test points. Refer to Section 3 of this guide for more information on the individual control test points.

The PMBus connector (P1) is provided to connect the USB to GPIO interface pod to the EVM. The USB to GPIO interface pod connects the EVM to a computer USB port which allows the TI “Fusion” Graphical User Interface (GUI) to communicate and control the EVM. To download the latest software visit, http://www.ti.com/tool/fusion_digital_power_designer.

The ALERT, DATA, CLK and CNTL test points are used to monitor the PMBus signals. Reference the TPSM846C23 4.5-V to 15-V In, 0.35-V to 2-V Out, 35-A PMBus Power Module Data Sheet for details on the supported PMBus commands.

The PMBus address is set by resistors R6 and R7. The PMBus address is 27 (decimal), 1B (hex).

The Vout Gain jumper (P4) is used to set the output voltage range. Select X1 for output voltages between 0.35 V–1.65 V and select X2 for output voltages between 1.65 V–2.0 V. The default loading is the X1 position.

The Comp Select jumper (P3) sets the proper frequency compensation for the total amount of output capacitance present on the VOUT bus. The EVM is shipped with approximately 1000 µF of output capacitance loaded on the board. Locations are provided on the board to add additional output capacitance (C18–C21, C24, C25). The default Comp Select jumper is loaded in the 1000-µF position which is the correct setting for output capacitance from 1000 µF to 1500 µF. The jumper position labeled 2000 µF selects compensation components for 1500 µF to 3000 µF of output capacitance. The jumper position labeled USER selects compensation components for 3000 µF to 5000 µF of output capacitance. See the TPSM846C23 4.5-V to 15-V In, 0.35-V to 2-V Out, 35-A PMBus Power Module Data Sheet for more information on selecting compensation components.

The Fsw Select jumper (P2) is used to set the switching frequency. Select from 300 kHz, 500 kHz, 750 kHz, and 1 MHz. The default jumper loading is the 500-kHz position.