SLVUC07A December   2020  – May 2021 TPS543320

 

  1.   Trademarks
  2. 1Introduction
    1. 1.1 Background
    2. 1.2 Before You Begin
    3. 1.3 Performance Characteristics Summary
  3. 2Configurations and Modifications
    1. 2.1 Output Voltage
    2. 2.2 Switching Frequency (FSEL Pin)
    3. 2.3 Current Limit, Soft-Start Time, and Internal Compensation (MODE Pin)
    4. 2.4 Adjustable UVLO
  4. 3Test Setup and Results
    1. 3.1  Input/Output Connections
    2. 3.2  Efficiency
    3. 3.3  Output Voltage Regulation
    4. 3.4  Load Transient and Loop Response
    5. 3.5  Output Voltage Ripple
    6. 3.6  Input Voltage Ripple
    7. 3.7  Synchronizing to a Clock
    8. 3.8  Start-up and Shutdown with EN
    9. 3.9  Start-up and Shutdown with VIN
    10. 3.10 Hiccup Current Limit
    11. 3.11 Overvoltage Protection
    12. 3.12 Thermal Performance
  5. 4Board Layout
    1. 4.1 Layout
  6. 5Schematic and Bill of Materials
    1. 5.1 Schematic
    2. 5.2 Bill of Materials
  7. 6Revision History

Load Transient and Loop Response

Figure 3-9 and Figure 3-10 show the response to load transients for both designs. The current step is from 0.75 A to 2.25 A and the current step slew rate is 1 A/µs. An electronic load is used to provide a DC 0.75-A load and the load transient circuit on the EVM is used to provide a 1.5-A step. The VOUT voltage is measured using TP10 for U1 and TP29 for U2.

When using the load transient circuit included on the TPS543320EVM, slowly increase amplitude of function generator for desired load step amplitude then vary the rise and fall times for the desired slew rate. The current for the load step can be sensed with the ISNS test point. The default resistors on the EVM provide a gain of 10 A/V. With this gain, a 1.5-A step will result in 150-mV at the ISNS test point.

Note:

To use the load transient circuit with U1, move R27 to R28.

Figure 3-11 and Figure 3-12 show the loop characteristics for both designs. Gain and phase plots are shown for VIN voltage of 12 V and a 0.72-Ω or 1.32-Ω resistive load.

GUID-20201130-CA0I-H6WB-RGDB-JBK3PTCKVW0R-low.pngFigure 3-9 U1 Transient Response
GUID-20201130-CA0I-2K49-1SCS-9V1ZBK51NH44-low.gifFigure 3-11 U1 Bode Plot
GUID-20201130-CA0I-K13J-S6DZ-5ZTHN5XNLFX6-low.pngFigure 3-10 U2 Transient Response
GUID-20201130-CA0I-LRKJ-GFB5-2N9JRBJSPBZ4-low.gifFigure 3-12 U2 Bode Plot

Figure 3-13 and Figure 3-14 shows the loop characteristics for U2 with the 3 different ramp settings.

GUID-20201130-CA0I-53KC-SX3G-QRTLX2MHZFB0-low.gifFigure 3-13 U2 Loop Gain with Different Ramp Settings
GUID-20201130-CA0I-0P0R-V4WW-BXF2ZPNSWXLG-low.gifFigure 3-14 U2 Loop Phase with Different Ramp Settings