SLYT819 October   2021 BQ25980

 

  1. Introduction
  2. Delivering over 100 W power with USB PD
  3. High-efficiency switched-capacitor DC/DC converters
  4. Output impedance
  5. Switching losses
    1. 5.1 Turnon switching loss
    2. 5.2 Turnoff switching loss
    3. 5.3 Gate driving loss
  6. Dual-phase interleaved switched-capacitor converter
  7. High-power-density switched-capacitor converter
  8. Switched-capacitor converter application: fast charging for portable devices
  9. Conclusion
  10. 10Related Websites
  11. 11Important Notice

Output impedance

There are two asymptotic limits in the output impedance: the slow switching limit and the fast switching limit. The slow switching limit is dominated by the charging sharing loss in the capacitors, assuming that the resistance in the converter is zero. The fast switching limit is dominated by the conduction loss, assuming that the capacitance is infinite and the voltage across the capacitor is constant [3].

A charge flow vector method derived in [3] calculates the slow and fast switching limits. Equation 1 and Equation 2 express charge flows in the capacitors and switches with respect to output charge and current:

Equation 1. q c j = a c j q o u t = a c j I o u t f s w
Equation 2. q r j = a r j q o u t = a r j I o u t f s w

where, q c j and q r j are the capacitor and switch charge flow vectors in phase j, and ac and ar are the charge multiplier vectors.

Figure 4-1 illustrates the charge flow in the flying capacitor and switches Q1 through Q4 for the 2-to-1 switched-capacitor converter. The duty cycle for both the charging and discharging phases is fixed at 50%.

Figure 4-1 Capacitor and switches charge flow: charging, phase 1 (a); discharging, phase 2 (b).

Based on Figure 4-1, the input charge is half the output charge. Equation 3 expresses the capacitor charge multiplier, ac:

Equation 3. a c = a C F L Y _ 1 = - a C F L Y _ 2 = 1 2

Equation 4 expresses the switch charge multiplier, ar:

Equation 4. a r = a Q 1   ,   a Q 2   ,   a Q 3   ,   a Q 4     T = 1 2 , - 1 2 , 1 2 , - 1 2 T

After obtaining the charge multiplier, Equation 5 and Equation 6 calculate the slow and fast switching limits, with details of the analysis available in [3].

Equation 5. R S S L = - v o u t i o u t = a c ,   i 2 C i f s w
Equation 6. R F S L = 2 R i a r , i 2

The real switched-capacitor converter contains both charge-sharing loss and conduction loss. Equation 7 could approximate the output resistance for converter design purposes [4], with RSSL the slow switching limit calculated at the given converter switching frequency.

Equation 7. R o u t R S S L 2 + R F S L 2

Figure 4-2 is the power loss based on the output impedance of the 2-to-1 switched-capacitor converter over the switching frequency. The power loss of the fast switching limit is normalized to 1. The power loss continues to drop as the frequency increases because the fast switching limit is inversely proportional to the switching frequency. In a real application, however, you would need to include the switching loss to select the switching frequency.

GUID-20211027-SS0I-KH8S-PM7F-XL5DSQGZ3FVZ-low.png Figure 4-2 Output impedance power loss of the 2-to-1 switched-capacitor converter.