SLYT872 November   2025 LM74700D-Q1

 

  1.   1
  2. 12
  3. 2Challenge 1: High voltage stress during reverse supply fault
  4. 3Challenge 2: Compliance to LV148 load dump and switching transients
  5. 4Single controller-based solution
  6. 5Proposed cascaded ideal diode configuration
  7. 6Component selection and test results
  8. 7Conclusion
  9. 8References

2 Challenge 1: High voltage stress during reverse supply fault

As seen in Figure 2, primary power distribution requires seamless power. High voltage battery (VPRIM) is stepped down by a DC/DC converter for a 48V rail and then a backup 48V auxiliary supply (VAUX) provides a redundant supply when ORed. In case of reverse polarity fault at VIN1, the DC/DC converter output VIN2 powers the entire load as shown in the simplified illustration Figure 3. However, this causes high voltage stress for the ORing on the auxiliary supply path. A 48V source can reach a maximum of 54V to create the large voltage difference of 108V between CATHODE to ANODE pins of the controller LM74700D-Q1, exceeding the absolute max rating of 75V. The solution also requires at least 120V-rated MOSFETs that are comparatively more expensive than 60V FETs and are hard to multi-source.

Voltage stress under input reverse polarity condition Figure 3 Voltage stress under input reverse polarity condition