SNAU266A July   2021  – August 2022

 

  1.   Abstract
  2. 1First-Time Setup
    1. 1.1 Evaluation Module Contents
    2. 1.2 Evaluation Setup Requirements
  3. 2EVM Connections
    1. 2.1 Connection Diagram
    2. 2.2 Power Supply
    3. 2.3 Reference Clock
    4. 2.4 Output Connections
    5. 2.5 Programming Interface
  4. 3Feature Evaluation
    1. 3.1 Buffer, Divider, and Multiplier Modes
    2. 3.2 SYSREF Generation
    3. 3.3 SYSREF Delay Generators
  5. 4Schematic
  6. 5PCB Layout and Layer Stack-Up
    1. 5.1 PCB Layer Stack-Up
    2. 5.2 PCB Layout
  7. 6Bill of Materials
  8.   A Troubleshooting
  9.   B USB2ANY Firmware Upgrade
  10.   C Revision History

A Troubleshooting

General Guidance

  • Do not make modifications to the EVM or change the default settings until AFTER it is verified to be working.
  • Register readback requires programming MUXOUT_EN = 1 and MUXOUT_SEL = 1. The GUI will also prompt to configure this register before attempting any readback operation.
  • The POR current of the LMX1204EVM is between 400 mA and 500 mA with the CLKIN source disabled, and 620 mA with the CLKIN source enabled and oscillating.
  • The power-down current of the EVM is approximately 50 mA, which is considering about 40mA ground current of the LDO.

If Output Not Seen on CLKOUT

CLKOUT should oscillate after POR when CLKIN is powered and enabled. No EVM programming is required just to get output from CLKOUT.

  • Confirm the EVM is connected to 3.3 V, and draws approximately 400 mA to 500 mA before CLKIN is applied.
  • Confirm the reference input is connected to CLKIN and the reference source is powered and enabled.
  • Confirm reference frequency is at least 300 MHz, and input power is at least 0 dBm.
  • Confirm enabling CLKIN increases the EVM current to approximately 620 mA.

If Device Features Not Active

The POR defaults for LMX1204 disable the LOGICLK, SYSREF, and other features. Only buffer mode is active by default. Register settings must be updated to observe these features.

  • Confirm the USB cable is connected to the EVM.
  • Confirm the connection mode is SPI and the USB2ANY interface is indicated in green on the bottom bar.
  • If multiple USB2ANY boards are connected, confirm the correct USB2ANY is connected from USB Communications → Interface pop-up using the identify button.
  • Ensure all registers have been loaded (Ctrl+L), and that the device current has changed proportional to the number of functional blocks enabled in the device.
  • If a communication issue with the device is suspected, try toggling the POWERDOWN bit from the User Controls page and observe the EVM current. Note that the first write to R0 after POR will be ignored. If the EVM current does not drop to about 50 mA after POWERDOWN is set, a communication issue may be preventing programming, or the IC may be damaged.

If Multiplier Frequency Not Accurate

The multiplier requires several registers to be programmed, and a calibration must be triggered by R0 write whenever the frequency changes or when the multiplier is first selected.

  • Confirm the frequency input and output range for the device is appropriate. The GUI will indicate if frequencies are out of range by highlighting the input or output box with the range violation.
  • Ensure that all registers have been loaded (Ctrl+L). This should also calibrate the multiplier.
  • Try toggling the RESET bit on the User Controls page before loading all registers again (Ctrl+L).

If Divider Frequency Not Accurate

The main clock output divider is designed with the expectation that the register settings will be loaded only once after POR. In some cases, the main clock output divider does not always cleanly transition between divide values if the value is changed after POR. To change the divider value, toggle the RESET bit on the User Controls page and load all registers again (Ctrl+L).

If SYSREF Not Observed

There are several settings which must be correct to achieve SYSREF outputs.

  • Ensure the following settings:
    • Set SYSREF_MODE to Continuous (for debugging)
    • SRREQ_MODE field set to SYSREFREQ mode
    • SRREQ_VCM set for DC-coupled, with about 1.1 V on SYSREFREQ_N and 1.5 V on SYSREFREQ_P
    • SYSREF_DLY_BYP field set to use delay
    • SYSREF_EN=1
  • Ensure the frequencies of the SYSREF_DLY_DIV, SYSREF_DIV_PRE, and SYSREF_DLY_ADJ are correctly configured. The GUI will highlight any frequency violations.
  • Ensure that FINTERPOLATOR % FSYSREF = 0. The GUI will highlight the SYSREF divider in case of violations.
  • Ensure that the output channel (CHx_EN/LOGIC_EN) and the SYSREF buffer (SYSOUTx_EN/LOGISYS_EN) are enabled.
  • Confirm that Windowing mode is not enabled on the User Controls page (SYSWND_EN=0).
  • Confirm that R15[9]=1. This should be set automatically by the GUI, so this potential root cause should be rare.
  • Confirm the 1.1-V and 1.5-V source for SYSREFREQ_N and SYSREFREQ_P respectively are actually resulting in the required voltages at the pins. If power supplies are used for these voltages, it is not uncommon for the supplies to be unable to sink current; the 1.1-V source may not be able to sink current from the 1.5-V supply through the internal 100-Ω impedance. An arbitrary function generator is recommended if possible.