SNLA370A December   2020  – December 2020 DP83TG720R-Q1 , DP83TG720S-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Device Comparison
    1. 2.1 Feature Comparison
    2. 2.2 Pin Map Comparison
    3. 2.3 Strap Comparison
      1. 2.3.1 PHY Address Straps
      2. 2.3.2 MAC Interface, Master/Slave, Autonomous Strap
    4. 2.4 Power-Supply Comparison
    5. 2.5 MDI Comparison
  4. 3Reference Schematics
  5. 4Summary
  6. 5Revision History

2.2 Pin Map Comparison

The Table 2-2 shows pin comparison between DP83TC811 and DP83TG720.

Table 2-2 Pin Comparison Table
Pin No. DP83TC811 DP83TG720
1 MDC MDC
2 INT_N INT_N
3 RESET_N RESET_N
4 XO XO
5 XI XI
6 LED_1 LED_1
7 1 EN VSLEEP
823 WAKE WAKE
9 DNC4 VDD1P06
105 INH INH
11 VDDA6 VDDA6
12 TRD_P TRD_P
13 TRD_M TRD_M
14 RX_ER STRP1
15 RX_DV RX_CTRL
16 CLKOUT CLKOUT
17 TCK DNC4
18 TDO DNC4
19 TMS DNC4
20 TCK DNC4
21 DNC4 VDD1P06
22 VDDIO6 VDDIO6
23 RX_D37 RX_D3
24 RX_D27 RX_D2
25 RX_D17 RX_D1
26 RX_D07 RX_D0
27 RX_CLK7 RX_CLK
28 TXCLK7 TXCLK
29 TX_EN7 TX_CTRL
30 TX_D37 TX_D3
31 TX_D27 TX_D2
32 TX_D17 TX_D1
33 TX_D07 TX_D0
34 TX_ER VDDIO6
35 LED_0 LED_0
36 MDIO MDIO
  1. Pin 7's functionality in DP83TC811 is of an input pin to put the phy in the disabled state (when low) and works on VDDIO supply domain. Whereas Pin 7 of DP83TG720 is a supply pin which must be connected to 3.3V supply (supply should be on for both functional and sleep mode).
  2. Wake pin of DP83TC811 should be on VDDIO supply domain and should be asserted high for wake-up feature. Whereas Wake pin of DP83TG720 should be on VSLEEP supply domain and sending high pulse for defined duration is sufficient for wake-up feature.
  3. DP83TC811 does not require turning off of any external supply for PHY to go into sleep mode. DP83TG720's supplies must be powered down for PHY to go into sleep mode. Refer to data sheet of DP83TG720 for application diagram for its sleep mode.
  4. Do Not Connect : These pins must be left floating. Test structures connected to these pins and should be kept floating to avoid damage or wrong mode entry of PHY
  5. DP83TC811 has INH pin on VDDIO domain and is high (Vddio level) when PHY is in sleep mode. Whereas DP83TG720 has INH pin on VSLEEP domain (3.3V) and is low when PHY is in sleep mode.
  6. Refer to respective data sheets and reference schematic in this document for the power supply network requirements.
  7. For Rgmii use case, layout constraint for 1Gbps Rgmii signals should be followed to facilitate reuse of MAC routes for both DP83TG720 and DP83TC811.