2 SEE Mechanisms

The primary single-event effect (SEE) events of interest in the LMP7704-SP are single-event latch-up (SEL). From a risk and impact point-of-view, the occurrence of an SEL is potentially the most destructive SEE event and the biggest concern for space applications. The VIP050 process was used for the LMP7704-SP. CMOS circuitry introduces a potential for SEL susceptibility. SEL can occur if excess current injection caused by the passage of an energetic ion is high enough to trigger the formation of a parasitic cross-coupled PNP and NPN bipolar structure (formed between the p-sub and n-well and n+ and p+ contacts). The parasitic bipolar structure initiated by a single-event creates a high-conductance path (inducing a steady-state current that is typically orders-of-magnitude higher than the normal operating current) between power and ground that persists (is latched) until power is removed or until the device is destroyed by the high-current state.

This study was performed to evaluate the SEL effects with a bias voltage of 5.5 V on V_IN and supply voltage of 12 V (V_S = ±6 V). Heavy ions with LET_EFF = 85 MeV-cm²/mg were used to irradiate the devices. Flux of 10⁵ ions/s-cm² and fluence of 10⁷ ions/cm² were used during the exposure at 125°C. The VIP050 process modifications applied for SEL mitigation were shown to be sufficient because the LMP7704-SP exhibited no SEL with heavy-ions up to an LET_EFF of 85 MeV-cm²/mg at a fluence of 10⁷ ions/cm² and a chip temperature of 125°C.