A dynamic voltage pulse from 12 V to –12 V is applied at the input of the LM74700DDFEVM. Figure 3-1 shows the input voltage (CH1) drops down to –12 V and the output voltage (CH2) does not go negative. Therefore, the load is protected from dynamic reverse pulses at the input. The LM74700-Q1 reacts to the negative voltage within 2 μs and it shuts down the MOSFET by pulling the gate (CH3) voltage down. The output slowly decays due to the large output capacitors and increased time constant.

Figure 3-1 Reverse Polarity 12 V to –12 V

A –12-V source is connected to the VIN input of the LM74700DDFEVM. Figure 3-2 shows that the output voltage remains at a constant 0 V in this situation. This test simulates the event of connecting a 12-V battery in the reverse direction; therefore, protecting the load from negative input voltages.

Figure 3-2 Startup Reverse Polarity (–12 V)