SNVAA63 March   2023 TPSM365R6

 

  1.   Abstract
  2.   Trademarks
  3. 1Inverting Buck-Boost Topology
    1. 1.1 Concept
    2. 1.2 Output Current Calculations
    3. 1.3 VIN and VOUT Range in Inverting Configuration
  4. 2Design Considerations
    1. 2.1 Additional Bypass Capacitor and Schottky Diode
    2. 2.2 Start-up Behavior and Switching Node Consideration
  5. 3External Components
    1. 3.1 Capacitor Selection
    2. 3.2 System Loop Stability
  6. 4Typical Performance
  7. 5Digital Pin Configurations
    1. 5.1 Digital Input Pin
    2. 5.2 Power-Good Pin
  8. 6Conclusion
  9. 7References

2.2 Start-up Behavior and Switching Node Consideration

The voltage on the SW pin switches from VIN to –VOUT in an IBB topology instead of from VIN to TPSM365R6 IC GND in a buck application. When the high-side MOSFET turns on, the SW node sees the input voltage. When the low-side MOSFET turns on, the SW node detects the device's SYS_GND, which is tied to the negative output voltage pin, –VOUT. During start-up, VIN rises to achieve the desired input voltage. VOUT starts ramping down after the EN pin voltage exceeds its threshold level and VIN exceeds its UVLO threshold. As -VOUT continues to ramp down, the low level of the SW node follows -VOUT. Figure 2-3 shows the resulting normal, smooth start-up of the output voltage.

Figure 2-3 SW Node Voltage During Start-Up