SNVU786 May   2021 LP5860

 

  1.   Read This First
    1.     About This Manual
    2.     Notational Conventions
    3. 1.1 Glossary
    4.     Related Documentation
    5. 1.1 Support Resources
    6.     Trademarks
  2. 1Introduction/Feature Overview
    1. 1.1 Overview
    2. 1.2 Description
  3. 2 Register Maps
    1. 2.1  Register Map Table
    2. 2.2  CONFIG Registers
    3. 2.3  GROUP Registers
    4. 2.4  LED_DOT_GROUP Registers
    5. 2.5  LED_DOT_ONOFF Registers
    6. 2.6  FAULT_STATE Registers
    7. 2.7  LOD Registers
    8. 2.8  LSD Registers
    9. 2.9  LOD_CLR Registers
    10. 2.10 LSD_CLR Registers
    11. 2.11 RESET Registers
    12. 2.12 DC Registers
    13. 2.13 PWM Registers
  4. 3Revision History

2.3 GROUP Registers

Table 2-8 lists the GROUP registers. All register offset addresses not listed in Table 2-8 should be considered as reserved locations and the register contents should not be modified.

Grpoup Configuration

Table 2-8 GROUP Registers
Address Acronym Register Name Section
5h Master_bri Global PWM configuration Go
6h Group0_bri Group1 PWM configuration Go
7h Group1_bri Group2 PWM configuration Go
8h Group2_bri Group3 PWM configuration Go
9h R_current_set Group1 current configuration Go
Ah G_current_set Group2 current configuration Go
Bh B_current_set Group3 current configuration Go

2.3.1 Master_bri Register (Address = 5h) [Default = FFh]

Master_bri is shown in Figure 2-6 and described in Table 2-9.

Return to the Summary Table.

Figure 2-6 Master_bri Register
7 6 5 4 3 2 1 0
PWM_Global
R/W-FFh
Table 2-9 Master_bri Register Field Descriptions
Bit Field Type Default Description
7-0 PWM_Global R/W FFh Global PWM setting

2.3.2 Group0_bri Register (Address = 6h) [Default = FFh]

Group0_bri is shown in Figure 2-7 and described in Table 2-10.

Return to the Summary Table.

Figure 2-7 Group0_bri Register
7 6 5 4 3 2 1 0
PWM_Group1
R/W-FFh
Table 2-10 Group0_bri Register Field Descriptions
Bit Field Type Default Description
7-0 PWM_Group1 R/W FFh Group1 PWM setting

2.3.3 Group1_bri Register (Address = 7h) [Default = FFh]

Group1_bri is shown in Figure 2-8 and described in Table 2-11.

Return to the Summary Table.

Figure 2-8 Group1_bri Register
7 6 5 4 3 2 1 0
PWM_Group2
R/W-FFh
Table 2-11 Group1_bri Register Field Descriptions
Bit Field Type Default Description
7-0 PWM_Group2 R/W FFh Group2 PWM setting

2.3.4 Group2_bri Register (Address = 8h) [Default = FFh]

Group2_bri is shown in Figure 2-9 and described in Table 2-12.

Return to the Summary Table.

Figure 2-9 Group2_bri Register
7 6 5 4 3 2 1 0
PWM_Group3
R/W-FFh
Table 2-12 Group2_bri Register Field Descriptions
Bit Field Type Default Description
7-0 PWM_Group3 R/W FFh Group3 PWM setting

2.3.5 R_current_set Register (Address = 9h) [Default = 40h]

R_current_set is shown in Figure 2-10 and described in Table 2-13.

Return to the Summary Table.

Figure 2-10 R_current_set Register
7 6 5 4 3 2 1 0
RESERVED CC_Group1
R-0h R/W-40h
Table 2-13 R_current_set Register Field Descriptions
Bit Field Type Default Description
7 RESERVED R 0h Reserved
6-0 CC_Group1 R/W 40h Color-group current setting (CC) of group 1 (CS0, CS3, CS6, CS9, CS12, CS15)

2.3.6 G_current_set Register (Address = Ah) [Default = 40h]

G_current_set is shown in Figure 2-11 and described in Table 2-14.

Return to the Summary Table.

Figure 2-11 G_current_set Register
7 6 5 4 3 2 1 0
RESERVED CC_Group2
R-0h R/W-40h
Table 2-14 G_current_set Register Field Descriptions
Bit Field Type Default Description
7 RESERVED R 0h Reserved
6-0 CC_Group2 R/W 40h Color-group current setting (CC) of group 2 (CS1, CS4, CS7, CS10, CS13, CS16)

2.3.7 B_current_set Register (Address = Bh) [Default = 40h]

B_current_set is shown in Figure 2-12 and described in Table 2-15.

Return to the Summary Table.

Figure 2-12 B_current_set Register
7 6 5 4 3 2 1 0
RESERVED CC_Group3
R-0h R/W-40h
Table 2-15 B_current_set Register Field Descriptions
Bit Field Type Default Description
7 RESERVED R 0h Reserved
6-0 CC_Group3 R/W 40h Color-group current setting (CC) of group 3 (CS2, CS5, CS8, CS11, CS14, CS17)