SNVU883 December   2023

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   6
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 TPS389C0XEVM Hardware Setup
    3. 2.3 EVM Connectors
      1. 2.3.1 EVM Test Points
      2. 2.3.2 EVM Jumpers
    4. 2.4 EVM Setup and Operation
      1. 2.4.1 Example Operation of TPS389C0X-Q1
  9. 3Software
    1. 3.1 Setup and GUI Installations
      1. 3.1.1 TPS389C0XEVM Software Setup
    2. 3.2 Quick Start to TPS389C0XEVM GUI
  10. 4Hardware Design Files
    1. 4.1 TPS389C0XEVM Schematic
    2. 4.2 Layout and Component Placement
      1. 4.2.1 Layout
    3. 4.3 Bill of Materials
  11. 5Additional Information
    1.     Trademarks
  12. 6Related Documentation

Device Information

The TPS389C03-Q1 device is used to monitor rails for systems such as Advanced Driver Assistance Systems (ADAS) and sensor fusion.

TPS389C03-Q1 provides over and under voltage monitoring for up to 3 channels and is an excellent choice for systems that operate on low-voltage supply rails and have narrow margin supply tolerances. Thresholds can be factory configured as defined by the user and subsequently changed via I2C after power-up.

TPS389C03-Q1 offers additional safety features such internal glitch immunity and noise filters to eliminate false resets resulting from erroneous signals. An integrated Q&A watchdog meant to verify the SOC is functioning properly. A built-in ADC for voltage readouts to provide redundant error checking, CRC error checking, and error signal monitoring (ESM) used to monitor the error output of the SOC or microcontroller.

If a fault is recognized by TPS389C03-Q1 pin NIRQ, then high under normal operation are asserted low signaling a fault. NIRQ remains in the low state until the action causing the fault is no longer present and a 1-to-clear is written to the bit signaling the fault. The type of fault experienced by TPS389C03-Q1 can be determined by reading the value stored in the corresponding interrupt register under BANK 0. Additionally NRST, high under normal operation, asserts when MONx falls outside of the over-voltage or under-voltage threshold window if mapped to a monitor fault. NRST when asserted by a monitor fault stays asserted for the reset timeout period after MONx falls back within the window threshold. NRST can also be mapped to a Watchdog or ESM fault, when NRST is asserted due to Watchdog or ESM faults NRST stays asserted for the reset timeout period after the fault is detected. WDO, high under normal operation, asserts during a Watchdog fault and can be mapped to an ESM fault if desired. WDO can be latched or have an associated WDO delay based on the OTP setting. Pins NIRQ, NRST, and WDO are open drain outputs and require an external pull up resistance to supply voltage.