SNVU898A May   2024  – October 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
      1. 1.3.1 Application Circuit Diagram
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line and Load Regulation, Efficiency
  8. 3Implementation Results
    1. 3.1 Test Data and Performance Curves
      1. 3.1.1 Conversion Efficiency
      2. 3.1.2 Operating Waveforms
        1. 3.1.2.1 Load Transient Response
        2. 3.1.2.2 Line Transient Response
        3. 3.1.2.3 Start-Up and Shutdown With VIN
      3. 3.1.3 CISPR 25 EMI Performance
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
    3. 4.3 Bill of Materials
  10. 5Device and Documentation Support
    1. 5.1 Device Support
      1. 5.1.1 Development Support
    2. 5.2 Documentation Support
      1. 5.2.1 Related Documentation
        1. 5.2.1.1 PCB Layout Resources
        2. 5.2.1.2 Thermal Design Resources
  11. 6Additional Information
    1. 6.1 Trademarks
  12. 7Revision History

2.1.1 EVM Connections

Referencing the EVM connections described in Table 2-1, the recommended test setup to evaluate the LM25148B-Q1EVM-2100 is shown in Figure 2-1. Working at an ESD-protected workstation, make sure that any wrist straps, boot straps, or mats are connected and referencing the user to earth ground before handling the EVM.

LM25148B-Q1EVM-2100 EVM Test Setup Figure 2-1 EVM Test Setup
CAUTION:

Refer to the LM25148B-Q1 42V, Automotive, Synchronous, Buck DC/DC Controller With Ultra-Low IQ and Dual Random Spread Spectrum data sheet, LM25148-Q1 Quickstart Calculator, and WEBENCH® Power Designer for additional guidance pertaining to component selection and controller operation.

Table 2-1 EVM Power Connections
LABELDESCRIPTION
VIN+Positive input voltage power and sense connection
VIN–Negative input voltage power and sense connection
VOUT+Positive output voltage power and sense connection
VOUT–Negative output voltage power and sense connection
Table 2-2 EVM Signal Connections
LABELDESCRIPTION
GNDGND connection
CNFGConfiguration input - tie to GND to disable AEF
COMPError amplifier output
FBFB node
VDDABias supply connection for the analog circuits
PFMPFM/FPWM selection and Synchronization input
GNDGND connection
VCCXOptional external VCC bias supply for higher efficiency
BODE50Ω injection point for loop response
VOUTOutput voltage
ENENABLE input – tie to GND to disable the device
VCCBias supply connection for the gate drivers and AEF
PGOODPower-Good indicator