SNVU939A July   2025  – December 2025 TPSM65630

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5.     General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  6. 2Hardware
    1. 2.1 Additional Images
    2. 2.2 Power Requirements
    3. 2.3 Setup and Operation
  7. 3Implementation Results
    1. 3.1 Evaluation Setup
    2. 3.2 Performance Data and Results
  8. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  9. 5Additional Information
    1. 5.1 Trademarks
  10. 6Revision History

4.2 PCB Layouts

TPSM65630SEVM PCB Top Silkcreen Figure 4-2 PCB Top Silkcreen
TPSM65630SEVM PCB Top Layer Figure 4-3 PCB Top Layer
TPSM65630SEVM PCB Signal Layer 1 Figure 4-4 PCB Signal Layer 1
TPSM65630SEVM PCB Signal Layer 2 Figure 4-5 PCB Signal Layer 2
TPSM65630SEVM PCB Bottom Layer Figure 4-6 PCB Bottom Layer
TPSM65630SEVM PCB Bottom Silkcreen Figure 4-7 PCB Bottom Silkcreen