SPRACA2A July 2017 – March 2022 TMS320F280040-Q1 , TMS320F280040C-Q1 , TMS320F280041 , TMS320F280041-Q1 , TMS320F280041C , TMS320F280041C-Q1 , TMS320F280045 , TMS320F280048-Q1 , TMS320F280048C-Q1 , TMS320F280049 , TMS320F280049-Q1 , TMS320F280049C , TMS320F280049C-Q1
With devices growing in available memory, peripherals, and pin options, the need to enhance and allow further boot configurations is critical to developers. The boot mode options provided on the device drives the development strategy used to guarantee the device has the flexibility needed for all stages of development. Although code could be placed in flash to run custom kernels, this uses valuable flash memory space and adds additional delay before running the main application. C2000 devices over the years have strived toward a more configurable, less demanding boot flow by reducing the number of boot mode selection pins from 4 to 2 as well as adding some additional peripheral bootloader general-purpose input/output (GPIO) pin mux options. This application report is here to not only detail how these customizable options have changed on various C2000 devices, but also explain how the new boot options on F28004x device onwards lead to a much more customizable, flexible device. The following sections will cover several aspects of boot customizations now possible. One being the customization of how many boot mode select pins are allocated on the device, which allows for such scenarios where 0 boot mode select pins are used, if desired. Additionally, the boot mode select pin GPIOs are configurable and it is possible to create a fully user defined default boot mode selection table using a greater defined set of available boot modes.
For more details regarding boot up flow and the referenced configurable boot memory locations, see the device-specific reference guides and technical reference manuals (TRM):