SPRAD34B July   2023  – October 2023 MSPM0G1507

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Getting Started With MSPM0 Motor Control
  6. 3Brushed-DC Motor Control
    1. 3.1 Background
    2. 3.2 Software Architecture
    3. 3.3 Block Diagrams
      1. 3.3.1 H-Bridge Motor Driver
      2. 3.3.2 H-Bridge Gate Driver
    4. 3.4 Hardware Support
    5. 3.5 Software Support
    6. 3.6 Evaluating Brushed-DC with MSP Motor Control SDK
  7. 4Stepper Motor Control
    1. 4.1 Background
    2. 4.2 Software Architecture
    3. 4.3 Block Diagrams
    4. 4.4 Hardware Support
    5. 4.5 Software Support
    6. 4.6 Evaluating Stepper With MSP Motor Control SDK
  8. 5BLDC Sensored Trap Control
    1. 5.1 Background
    2. 5.2 Software Architecture
    3. 5.3 Block Diagrams
    4. 5.4 Hardware Support
    5. 5.5 Software Support
    6. 5.6 Evaluating Sensored Trap with MSP Motor Control
  9. 63-Phase Sensorless FOC Control
    1. 6.1 Background
    2. 6.2 Software Architecture
    3. 6.3 Block Diagrams
      1. 6.3.1 MSPM0Gx10x and Gate Driver with Analog/MOSFET Integration
      2. 6.3.2 MSPM0Gx50x Analog Integration and Gate Driver
    4. 6.4 Hardware Support
    5. 6.5 Software Support
    6. 6.6 Evaluating Sensorless FOC with MSP Motor Control
    7. 6.7 Sensorless FOC Performance
  10. 7References
  11.   Revision History

MSPM0Gx10x and Gate Driver with Analog/MOSFET Integration

In lower voltage FOC applications, many gate driver or motor driver devices integrate up to three current sense amplifiers with programmable gain, which offloads analog requirements from the MSPM0Gx device. MSPM0Gx10x devices without analog integration are available in packages as small as VSSOP-20 and 24-VQFN to reduce system size and provide low cost. MSPM0 can accurately sense the motor phase voltage, bus voltage, current, and speed quickly to provide feedback to the FOC algorithm using 12-bit simultaneous sampling 4-Mbps ADCs. This topology is designed for FOC applications that are low-cost and small form factor, such as pumps, fans, blowers, and small appliances.

As shown in Figure 6-7, the signals used this system topology are:

  • 6 PWM signals with adjustable deadband (6x PWM)
  • Logic-low fault signal from driver (nFAULT)
  • ADC current sense feedback from integrated or external current sense amplifiers to measure motor phase current, and bus sense voltage
  • Optional SPI read/write interface (for drivers with SPI interface)
GUID-20230607-SS0I-ZMQQ-PGTH-V2FVCRKT8WKW-low.svgFigure 6-3 Block Diagram for Sensorless FOC for BLDC Motors using MSPM0Gx10x and 3-Phase Gate or Motor Driver with Optional CSA and MOSFET Integration