SPRADS1 June 2025 F29H850TU
On the F29H85x, FOTA is supported by using an A/B swapping mechanism. An A/B swap is performed by changing the physical flash banks mapped to the active and inactive address space in flash. The active address space is the flash memory that is executed during runtime while the inactive address space is reserved for programming incoming firmware that can be activated after the A/B swap. Figure 1-1 shows an example of how flash banks are mapped to different address spaces during an A/B swap.
Figure 1-1 A/B Swapping on F29H85xThe flash-based UART secondary boot-loader with FOTA example was created to demonstrate this capability of the F29H85x. Hereafter, the example is referred to as SBL.
A key consideration when implementing FOTA on F29H85x is that only bank mode 1 and bank mode 3 support the A/B swapping mechanism. Bank mode 1 supports A/B swapping for only CPU1 and bank mode 3 supports A/B swapping for both CPU1 and CPU3. For more details about bank modes and the associated memory maps, refer to the F29H85x Technical Reference Manual (TRM).
The SBL supports the following features when the device is in bank mode 1:
When the device is bank mode 3, the SBL supports the following features:
To convert an HS-FS device to the HS-SE state, refer to the Serial Flash Programming of F29H85x application note. This project includes 4 different build configurations to be selected based on the desired features.
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BANKMODE_1 |
Non-Secure CPU1 FOTA Upgrades |
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BANKMODE_1_CP Device must be in HS-SE state |
Secure CPU1 and HSM FOTA Upgrades |
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BANKMODE_3 |
Non-Secure CPU1 and CPU3 FOTA Upgrades |
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BANKMODE_3_CP Device must be in HS-SE state |
Secure CPU1, CPU3, and HSM FOTA Upgrades |
Additional documentation on secure firmware upgrades can be found in the TIFS SDK (tifs_f29h85x_xx_xx_xx_xx/docs/api_guide_f29h85x/html/docs_src/secure_firmware_update/secure_firmware_update.html)