SPRUJ59A April 2024 – September 2024 TMS320F28P550SJ , TMS320F28P559SJ-Q1
Pie channel mapping between F28003x and F28P55x is different due to peripheral module changes between these devices. Table 3-6 summarizes the common and unique pie channel assignments on these two devices.
Color | Description |
---|---|
Pie channel common for both devices | |
Pie channel applicable only for F28003x | |
Pie channel applicable only for F28P55x |
INTx.1 | INTx.2 | INTx.3 | INTx.4 | INTx.5 | INTx.6 | INTx.7 | INTx.8 | INTx.9 | INTx.10 | INTx.11 | INTx.12 | INTx.13 | INTx.14 | INTx.15 | INTx.16 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
INT1.y | INT_ADCA1 | INT_ADCB1 | INT_ADCC1 | INT_XINT1 | INT_XINT2 | INT_SYS_ERR | INT_TIMER0 | INT_WAKE | INT_ADCD1 | INT_ADCE1 | ||||||
INT_SYS_ERR | ||||||||||||||||
INT2.y | INT_EPWM1_TZ | INT_EPWM2_TZ | INT_EPWM3_TZ | INT_EPWM4_TZ | INT_EPWM5_TZ | INT_EPWM6_TZ | INT_EPWM7_TZ | INT_EPWM8_TZ | INT_EPWM9_TZ | INT_EPWM10_TZ | INT_EPWM11_TZ | INT_EPWM12_TZ | ||||
INT3.y | INT_EPWM1 | INT_EPWM2 | INT_EPWM3 | INT_EPWM4 | INT_EPWM5 | INT_EPWM6 | INT_EPWM7 | INT_EPWM8 | INT_EPWM9 | INT_EPWM10 | INT_EPWM11 | INT_EPWM12 | ||||
INT4.y | INT_ECAP1 | INT_ECAP2 | INT_ECAP3 | INT_ECAP3_2 | ||||||||||||
INT5.y | INT_EQEP1 | INT_EQEP2 | INT_EQEP3 | INT_CLB1 | INT_CLB2 | INT_CLB3 | INT_CLB4 | INT_SDFM1 | INT_SDFM2 | INT_SDFM1DR1 | INT_SDFM1DR2 | INT_SDFM1DR3 | INT_SDFM1DR4 | |||
INT6.y | INT_SPIA_RX | INT_SPIA_TX | INT_SPIB_RX | INT_SPIB_TX | INT_DCC0 | INT_DCC1 | INT_SDFM2DR1 | INT_SDFM2DR2 | INT_SDFM2DR3 | INT_SDFM2DR4 | ||||||
INT7.y | INT_DMA_CH1 | INT_DMA_CH2 | INT_DMA_CH3 | INT_DMA_CH4 | INT_DMA_CH5 | INT_DMA_CH6 | INT_PMBUSA | INT_FSITXA1 | INT_FSITXA2 | INT_FSIRXA1 | INT_FSIRXA2 | INT_DCC0 | ||||
INT8.y | INT_I2CA | INT_I2CA_FIFO | INT_I2CB | INT_I2CB_FIFO | INT_SCIC_RX | INT_SCIC_TX | INT_LINA_0 | INT_LINA_1 | INT_LINB_0 | INT_LINB_1 | INT_PMBUSA | INT_DCC1 | ||||
INT9.y | INT_SCIA_RX | INT_SCIA_TX | INT_SCIB_RX | INT_SCIB_TX | INT_CANA0 | INT_CANA1 | INT_MCANA_0 | INT_MCANA_1 | INT_MCANB_0 | INT_MCANB_1 | INT_MCANB_ECC | INT_MCANB_WAKE | INT_BGCRC | INT_USB | INT_HICA | |
INT_MCANA_0 | INT_MCANA_1 | INT_MCANA_ECC | INT_MCANA_WAKE | |||||||||||||
INT10.y | INT_ADCA_EVT | INT_ADCA2 | INT_ADCA3 | INT_ADCA4 | INT_ADCB_EVT | INT_ADCB2 | INT_ADCB3 | INT_ADCB4 | INT_ADCC_EVT | INT_ADCC2 | INT_ADCC3 | INT_ADCC4 | INT_ADCD_EVT | INT_ADCD2 | INT_ADCD3 | INT_ADCD4 |
INT11.y | INT_CLA1_1 | INT_CLA1_2 | INT_CLA1_3 | INT_CLA1_4 | INT_CLA1_5 | INT_CLA1_6 | INT_CLA1_7 | INT_CLA1_8 | INT_ADCE_EVT | INT_ADCE2 | INT_ADCE3 | INT_ADCE4 | ||||
INT12.y | INT_XINT3 | INT_XINT4 | INT_XINT5 | INT_MPOST | INT_FLSS | INT_VCU | INT_MCANA_ECC | INT_MCANA_WAKE | INT_RAM_CORR_ERR | INT_FLASH_CORR_ERR | INT_RAM_ACC_VIOL | INT_AES | INT_BGCRC_CLA1 | INT_CLA_OVERFLOW | INT_CLA_UNDERFLOW | |
INT_FMC | INT_FPU_OVERFLOW | INT_FPU_UNDERFLOW | INT_AES_SINTREQUEST |