SPRUJ70A January   2023  – March 2024 AM69

 

  1.   1
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Inside the Box
    2. 1.2 Key Features and Interfaces
    3. 1.3 Thermal Compliance
    4. 1.4 Electrostatic Discharge (ESD) Compliance
  4. 2User Interfaces
    1. 2.1 Power Input
      1. 2.1.1 Power Input [J24] With LED for Status [LD4]
      2. 2.1.2 Power Budget Considerations
    2. 2.2 User Inputs
      1. 2.2.1 Board Configuration Settings [SW2]
      2. 2.2.2 Reset Pushbutton [SW3]
      3. 2.2.3 User Pushbutton [SW1] With User LED Indication [LD5]
    3. 2.3 Standard Interfaces
      1. 2.3.1 UART-Over-USB [J6] With LED for Status [LD1]
      2. 2.3.2 Gigabit Ethernet [J10] With Integrated LEDs for Status
      3. 2.3.3 On-Board JTAG/Emulator [J13] with optional External Interface [J15]
      4. 2.3.4 USB3.1 Gen1 Interfaces [J11] [J14]
      5. 2.3.5 Stacked DisplayPort and HDMI Type A [J16]
      6. 2.3.6 PCIe Connector [J3] for PCIe Card Modules
      7. 2.3.7 M.2 Key M Connector [J12] for SSD Modules
      8. 2.3.8 M.2 Key E Connector [J23] for Wi-Fi Networking Modules
      9. 2.3.9 MicroSD Card Cage [J32]
    4. 2.4 Expansion Interfaces
      1. 2.4.1 Heatsink [ACC] With [J22] Fan Header
      2. 2.4.2 CAN-FD Connector(s) [J4] [J5] [J8] [J9]
      3. 2.4.3 Expansion Header [J27]
      4. 2.4.4 Camera Interface, 22-Pin Flex Connectors [J1] [J2]
      5. 2.4.5 Camera Interface, 40-Pin High Speed [J31] [J30]
      6. 2.4.6 Automation and Control Connector [J17]
  5. 3Circuit Details
    1. 3.1 Top Level Diagram
    2. 3.2 Interface Mapping
    3. 3.3 I2C Address Mapping
    4. 3.4 GPIO Mapping
    5. 3.5 I2C GPIO Expander Mapping
    6. 3.6 Identification EEPROM
  6. 4Revision History

2.3.3 On-Board JTAG/Emulator [J13] with optional External Interface [J15]

The EVM supports an integrated XDS110 emulator for loading and debugging software. The EVM’s USB micro-B connector [J13] is connected to a Host-PC using supplied USB cable (Type-A to Micro-B). The computer can use Texas Instruments Code Composer Studio (CCS) to establish a connection with the processor and download/debug software on the various processor core(s). The circuit is powered through BUS power. LEDs [LD12] [LD3] are used to indicate an active connection with Host-PC/processor.

Optionally – an external JTAG emulation/debugger can connect using a dedicated emulation connector [J15]. The connector is aligned with the Texas Instrument 20-pin CTI header standard (2x20, 1.27mm pitch), and is compatible with Texas Instruments modules (XDS110, XDS200, XDS560v2) and 3rd party modules.

Table 2-5 Expansion Header Pin Definition [J15]
Pin # Pin Name Description Dir
1 TMS Test Mode Select Input
2 TRSTn Test Reset Input
3 TDI Test Data Input Input
4 TDIS Target Disconnect Output
5 Vref Target Voltage Detect, 3.3V Output
6 <No pin> No pin/Key
7 TDO Test Data Output Output
8 GND Ground
9 RTCK Test Clock Return Output
10 GND Ground
11 TCK Test Clock Input
12 GND Ground
13 EMU0 Emulation Pin 0 Bi-Dir
14 EMU1 Emulation Pin 1 Bi-Dir
15 RESETz Target Reset Input
16 GND Ground
17 Open
18 Open
19 Open
20 GND Ground
Note: In the DIR column, output is to the JTAG module, input is from the JTAG module. Bi-Dir signals can be configured as either input or output.