SSDA010 August   2025 MSPM0G3507

 

  1.   1
  2. 1Description
  3. 2Required Peripherals
  4. 3Design Steps
  5. 4Design Considerations
  6. 5Software Flow Chart
  7. 6Device Configuration
  8. 7Application Code
    1. 7.1 Application Code – Cascaded Signal Computation
  9. 8Results
  10. 9Additional Resources
  11.   Trademarks

Design Considerations

  1. Dynamic Range Centering: The op amp outputs must remain centered within the ADC's input range to maximize resolution and avoid clipping, especially when DC drift is present.
  2. Gain Selection and Stability: Proper gain settings for each stage are crucial to maintain the input signal is amplified enough for accurate detection without pushing the signal into saturation.
  3. EMA Filter Responsiveness: The exponential moving average filter must be tuned to track slow DC drift effectively while ignoring the AC signal and high-frequency noise.
  4. Sampling Rate Control: The timer must be configured to regulate how often signal measurements occur. The rate must be fast enough to track drift in real time, yet slow enough to avoid reacting to high-frequency content or causing unnecessary DAC updates.