TIDUF06 August   2022

 

  1.   Description
  2.   Resources
  3.   Features
  4.   Applications
  5.   5
  6. 1System Description
    1. 1.1 Key System Specifications
  7. 2System Overview
    1. 2.1 Block Diagram
    2. 2.2 Design Considerations
      1. 2.2.1 PCB and Form Factor
      2. 2.2.2 Power Supply Design
        1. 2.2.2.1 POC Filter
        2. 2.2.2.2 Power Supply Considerations
          1. 2.2.2.2.1 Choosing External Components
          2. 2.2.2.2.2 Choosing the Buck 1 Inductor
          3. 2.2.2.2.3 Choosing the Buck 2 and Buck 3 Inductors
          4. 2.2.2.2.4 Functional Safety
    3. 2.3 Highlighted Products
      1. 2.3.1 DS90UB953-Q1
      2. 2.3.2 TPS650330-Q1
      3. 2.3.3 IMX623
    4. 2.4 System Design Theory
  8. 3Hardware, Testing Requirements, and Test Results
    1. 3.1 Required Hardware
      1. 3.1.1 Hardware Setup
      2. 3.1.2 FPD-Link III I2C Initialization
      3. 3.1.3 IMX623 Initialization
    2. 3.2 Testing and Results
      1. 3.2.1 Test Setup
        1. 3.2.1.1 Power Supplies Startup
        2. 3.2.1.2 Power Supply Startup – 1.8 V Rail and Serializer PDB Setup
      2. 3.2.2 Test Results
        1. 3.2.2.1 Power Supplies Start Up
        2. 3.2.2.2 Power Supply Output Voltage Ripple
        3. 3.2.2.3 Power Supply Load Currents
        4. 3.2.2.4 I2C Communications
  9. 4Design Files
    1. 4.1 Schematics
    2. 4.2 Bill of Materials
    3. 4.3 PCB Layout Recommendations
      1. 4.3.1 PMIC Layout Recommendations
      2. 4.3.2 PCB Layer Stackup
      3. 4.3.3 Serializer Layout Recommendations
      4. 4.3.4 Imager Layout Recommendations
      5. 4.3.5 Layout Prints
    4. 4.4 Altium Project
    5. 4.5 Gerber Files
    6. 4.6 Assembly Drawings
  10. 5Related Documentation
  11. 6Trademarks

1 System Description

Many automotive applications require small form factors that enable compact, modular, and remote systems. The growing demand for automotive vision systems also requires the flexibility of system components to meet the requirements of various image sensors to reduce the camera module design cycle and time-to-market. This reference design addresses these challenges by including a 2.9-megapixel imager, 4-Gbps serializer, and four-channel PMIC within two 20-mm x 20-mm circuit boards. The only connection required by the system is a single 50-Ω coaxial (coax) cable.

DC power, the FPD-Link front-channel, and the FPD-Link back-channel enter the board through the FAKRA coax connector. The POC filter in Figure 1-1 blocks all of the high-speed content of the signal (without significant attenuation) while allowing the DC (power) portion of the signal to pass through inductor L5.

GUID-4694080D-9E55-4CD9-82C8-FB6477B8D303-low.gifFigure 1-1 POC Filter Schematic

The DC portion is connected to the input of the TPS650330-Q1 PMIC. A dedicated mid-voltage buck regulator converts this to an intermediate 3.8 V. The two low-voltage buck regulators provide a dedicated 1.1 V for the imager and a dedicated 1.8 V shared by both the imager and serializer. An integrated high-PSRR, low-noise LDO provides a clean 3.3 V analog supply for the imager. The high-frequency portion of the signal is connected directly to the serializer. This is the path that the video data and control backchannel take between the serializer and deserializer.

The output of the imager is connected through a 4-lane MIPI CSI-2 interface to the serializer. The serializer transmits this video data over a single LVDS pair to the deserializer located on the other end of the coax cable.

Additionally, on the same coax cable, there is a separate low-latency, bidirectional control channel that provides the additional function of transmitting control information from an I2C port. This control channel is independent of the video blanking period. It is used by the system microprocessor to configure and control the imager.