3 LED Driver

To achieve a high quality image, the LED illumination must be precisely timed with the image displayed on the DMD. The FPGA generates signals to support the required timing as shown in Figure 3-1. There is an LED enable signal for the overall LED driver and an individual enable for each LED color. This signal drives a low side driver MOSFET for each color as well as a shunt MOSFET for quickly turning off the illumination. The FPGA also generates a PWM for each color and two PMW select signals, allowing the 3 PWMs to be muxed to the current control pin of the LED driver. This gives the ability to select different current limits for each of the colors, which is important for color calibration and dimming the image for thermal derating. For example, if the projector is left on for an extended period of time, you may want to reduce the LED current but still allow an image to be displayed. The DGP reference design uses an LM3409 current control buck LED driver and is powered directly from the vehicle battery voltage. If another LED driver is selected, it's important that the driver can support shunt FET dimming; so a boost regulator could not be used here.

Figure 3-1 LED Driver Simplified Schematic