DLPS112D June   2018  – March 2026 DLPC3479

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Power Electrical Characteristics
    6. 5.6  Pin Electrical Characteristics
    7. 5.7  Internal Pullup and Pulldown Electrical Characteristics
    8. 5.8  DMD SubLVDS Interface Electrical Characteristics
    9. 5.9  DMD Low-Speed Interface Electrical Characteristics
    10. 5.10 System Oscillator Timing Requirements
    11. 5.11 Power Supply and Reset Timing Requirements
    12. 5.12 Parallel Interface Frame Timing Requirements
    13. 5.13 Parallel Interface General Timing Requirements
    14. 5.14 Flash Interface Timing Requirements
    15. 5.15 Other Timing Requirements
    16. 5.16 DMD SubLVDS Interface Switching Characteristics
    17. 5.17 DMD Parking Switching Characteristics
    18. 5.18 Chipset Component Usage Specification
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1  Input Source Requirements
        1. 6.3.1.1 Supported Resolution and Frame Rates
        2. 6.3.1.2 3D Display
        3. 6.3.1.3 Parallel Interface
          1. 6.3.1.3.1 PDATA Bus—Parallel Interface Bit Mapping Modes
      2. 6.3.2  Pattern Display
        1. 6.3.2.1 External Pattern Mode
          1. 6.3.2.1.1 8-Bit Monochrome Patterns
          2. 6.3.2.1.2 1-Bit Monochrome Patterns
        2. 6.3.2.2 Internal Pattern Mode
          1. 6.3.2.2.1 Free Running Mode
          2. 6.3.2.2.2 Trigger In Mode
      3. 6.3.3  Device Start-Up
      4. 6.3.4  SPI Flash
        1. 6.3.4.1 SPI Flash Interface
        2. 6.3.4.2 SPI Flash Programming
      5. 6.3.5  I2C Interface
      6. 6.3.6  Content Adaptive Illumination Control (CAIC)
      7. 6.3.7  Local Area Brightness Boost (LABB)
      8. 6.3.8  3D Glasses Operation
      9. 6.3.9  Test Point Support
      10. 6.3.10 DMD Interface
        1. 6.3.10.1 SubLVDS (HS) Interface
    4. 6.4 Device Functional Modes
    5. 6.5 Programming
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Application
      1. 7.2.1 Design Requirements
      2. 7.2.2 Detailed Design Procedure
      3. 7.2.3 Application Curve
  9. 8 Power Supply Recommendations
    1. 8.1 PLL Design Considerations
    2. 8.2 System Power-Up and Power-Down Sequence
    3. 8.3 Power-Up Initialization Sequence
    4. 8.4 DMD Fast Park Control (PARKZ)
    5. 8.5 Hot Plug I/O Usage
  10. 9 Layout
    1. 9.1 Layout Guidelines
      1. 9.1.1 PLL Power Layout
      2. 9.1.2 Reference Clock Layout
        1. 9.1.2.1 Recommended Crystal Oscillator Configuration
      3. 9.1.3 Unused Pins
      4. 9.1.4 DMD Control and SubLVDS Signals
      5. 9.1.5 Layer Changes
      6. 9.1.6 Stubs
      7. 9.1.7 Terminations
      8. 9.1.8 Routing Vias
      9. 9.1.9 Thermal Considerations
    2. 9.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Device Nomenclature
        1. 10.1.2.1 Device Markings
      3. 10.1.3 Video Timing Parameter Definitions
    2. 10.2 Documentation Support
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Other Timing Requirements

MINMAXUNIT
trise, all(1)(2)20% to 80% reference points10ns
tfall, all(1)(2)80% to 20% reference points10ns
trise, PARKZ(2)20% to 80% reference points150ns
tfall, PARKZ(2)80% to 20% reference points150ns
tw, GPIO_08 (normal park) pulse width(3)200ms
I2C baud rate100kHz
Unless noted elsewhere, the following signal transition times are for all DLPC34xx signals.
This is the recommended signal transition time to avoid input buffer oscillations.
When the controller is turned off by setting PROJ_ON low, PROJ_ON must not be brought high again for at least 200ms. View Section 8.3 for additional requirements.