SBAA472 May 2021 ADS8353-Q1
The failure mode distribution estimation for ADS8353-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
| Die Failure Modes | Failure Mode Distribution (%) |
|---|---|
| ADC_A offset error out of specification | 10% |
| ADC_B offset error out of specification | 10% |
| ADC_A gain error out of specification | 10% |
| ADC_B gain error out of specification | 10% |
| REF_A output out of specification | 5% |
| REF_B output out of specification | 5% |
| 10x input leakage current on analog inputs | 5% |
| ADC_A and ADC_B conversions not synchronized | 5% |
| ADC_A or ADC_B output code bit error | 20% |
| Communication error | 20% |