SBAA558 October 2022 ADS9218 , ADS9219
Figure 1-1 illustrates a simplified SAR input structure for a traditional SAR ADC. The sampling process for this architecture is separated into an acquisition phase where switch S1 is closed, and a conversion phase where the switch is open and the ADC converts the sampled signal. The example covered here is a typical 2-MSPS converter with a 150-ns acquisition period and a 340-ns conversion period. During the 150-ns acquisition period the amplifier driving the input needs to respond to large transient currents. In this example, the transient is approximately 3.7 mA and must be fully settled in the 150-ns interval (see Figure 1-2).
A common amplifier used to drive the traditional SAR ADC is a 120-MHz op amp (OPA625). The discrete output filter cutoff frequency is set to 7.2 MHz (see Equation 1). To be effective, an antialiasing filter needs a cutoff frequency that is lower than the Nyquist frequency. For this device, the maximum Nyquist frequency for this ADC is 1 MHz, so clearly this does not act as an effective antialiasing filter.
This device also has transient current pulses on the reference input during the conversion cycle. Because of these current transients, the voltage reference requires a reference buffer. In this example design, the reference buffer is a composite two amplifier circuits so that DC performance and AC performance are optimized (see Figure 1-1). A simulation of the transient current for the ADC is shown in Figure 1-2. Notice that over the 340-ns conversion period there are 18 transient current pulses on the reference. The transient current can be as large as 42.4 mA for this device.
The main point of this section is to emphasize that the traditional SAR architecture has transients from switched capacitor circuits on the analog input and voltage reference input. These transients often require the use of wider bandwidth amplifiers than what is otherwise needed for the application. Furthermore, the transients prevent a simple antialiasing filter design.