SBAA791 June   2018 AMC1305M25

 

  1.   1
  2.   Summary
  3.   Trademarks
  4. 1Introduction to sampling solution of the high electrical isolation motor drive current
  5. 2Essence and implementation of SINC filter
  6. 3Configuration and calculation of SIGMA-DELTA filter module based on integration of AMC1305M25 and F28377S
    1. 3.1 Hardware configuration
    2. 3.2 F28377S software configuration
    3. 3.3 AMC1305M25 sense voltage versus F28377S digital expression
    4. 3.4 AMC1305M25 and F28377S zero drift and noise measurements
  7. 4References:
  8. 5Appendix:

2 Essence and implementation of SINC filter

SIGMA-DELTA modulator shifts the input noise to the high-frequency domain, and the frequency response of AMC1305M25 is shown in Figure 2-1, with an exponential increase in noise above 10KHz. Therefore, when using SIGMA-DELTA modulator solution, MCU or FPGA must provide a digital low-pass filter to complete the filtering of the bit stream in order to restore the detected active signal. The most common digital low-pass filter is SINC filter, and the multi-order SINC filter is also known as CIC (Cascaded-Integrator-Comb) filter[5][6]. SINC filter is the most frequently used in practical applications because it achieves effective low-pass filtering in the most “economical” manner while maintaining excellent performance. This section will discuss the essence of the SINC filter and its most simplified implementation.

1KHz signal output spectrum and quantization noise of SIGMA-DELTA modulator AMC1305 Figure 2-1 1KHz signal output spectrum and quantization noise of SIGMA-DELTA modulator AMC1305

FIR filter is most commonly used in sampling systems due to its phase linear response. SINC filter expression can be derived by transforming the general-purpose FIR filter[5]. Based on a linear time-invariant system, FIR filter output is:

FIR filter standard expression Figure 2-2 FIR filter standard expression
y n = x n + x n - 1 h 1 + x n - 2 h 2 + x n - 3 h 3 + ⋯ + x n - M + 1 h M - 1
y ( n - 1 ) = x ( n - 1 ) h ( 1 ) + x ( n - 2 ) h ( 2 ) + x ( n - 3 ) ( h 3 ) + x ( n - 4 ) h ( 4 ) + ⋯ + x ( n - M ) h ( M ) )

h(n) is Moving Average filter of “1”, h(0) = h(1) … = h(m) = 1:

y n - y n - 1 = x n - x n - M
y ( n ) = x ( n ) - x ( n - M ) + y ( n - 1 )

Using the Z transform, a single-cycle delay is equal to Z−1:

y z = x z + x z z - 1 + x z z - 2 + x z z - 3 + ⋯ + x z z - M - 1
y z z - 1 = x z z - 1 + x z z - 2 + x z z - 3 + x z z - 4 + ⋯ + x z z - M
y z = x z - x z z - M + y z z - 1
y z = x z - x z z - M 1 - z - 1
Equation 1. H z = 1 - z - M 1 - z - 1

From the most basic FIR filter, the Z-change expression shown in (1) can be derived, which is the recursive expression of the moving average filter in Figure 2-3.Figure 2-2 comparing with Figure 2-3 reveals that recursive expressions significantly reduce computing resources, requiring only one subtractor, one adder, and M+1 cache on hardware.

Iterative expression of FIR moving average filter-SINC first-order filter Figure 2-3 Iterative expression of FIR moving average filter-SINC first-order filter

Calculating the frequency response requires using = :

H e j w = e - j w M - 1 2 s i n w M 2 s i n M 2
Equation 2. H e j w = s i n w M 2 s i n w 2

(2) is approximated to SINC function (SINx/x), so it is also referred to as a SINC filter. Rearranging (1) yields formula (3) and Figure 2-4:

y z = x z - x z z - M 1 - z - 1
W z = x z 1 - z - 1
Equation 3. y z = W ( z ) - W z z - M
The first-order filter of SINC filter after rearranging Figure 2-4 The first-order filter of SINC filter after rearranging

The number of delay period M is combined with the down sampling rate R in formula (3). Delay W(n) sampling points by M periods, subtracting them is equivalent to sampling the signal every R period, then applying M/R delay. The output OUT yields the same result. Finally, you can get what is shown in Figure 2-5. If R=M, that constitutes the final SINC filter form. The output is a signal down sampled by a factor of M, where M also represents the number of pulses in the filter.

Hardware-optimized expression for SINC first-order filter combining down sampling and delay buffering Figure 2-5 Hardware-optimized expression for SINC first-order filter combining down sampling and delay buffering

(1) expression is recursive representation of FIR filter that is a first-order SINC filter. Therefore, Z expression for SINC3 filter, which is a third-order filter SINC, is shown as:

Equation 4. H z = 1 - z - M 1 - z - 1 3

For a SINC filter, the most important design parameters are the sampling rate fdata, SINC filter order O (The first-order, second-order and third-order correspond to 1, 2 and 3 respectively) and delay M. Typically, for hardware optimization, M equals the down sampling rate R.

From above, the main design parameters can be derived as:

R: Oversampling ratio/down sampling ratio; fdata data clock frequency (sampling frequency); O: SINC filter order

Equation 5. H z = 1 - z - M 1 - z - 1 O

Sampling frequency of output signal:

Equation 6. f s a m p l i n g = f d a t a R

SINC filter step response sampling delay is shown as:

Equation 7. T d = R × O f d a t a