SBAK047 March   2025 ADC3664-SEP

 

  1.   1
  2.   2
  3.   Trademarks
  4. 1Introduction
  5. 2Single-Event Effects
  6. 3Irradiation Facility and Setup
  7. 4Depth, Range, and LETEFF Calculation
  8. 5Test Setup and Procedures
  9. 6Destructive Single-Event Effects (DSEE)
    1. 6.1 Single-Event Latch-Up (SEL) Results
  10. 7Single-Event Transients (SET)
    1. 7.1 Single Event Transients
  11. 8Summary
  12. 9References

4 Depth, Range, and LETEFF Calculation

The ADC3664-SEP is fabricated in the TI CMOS C021(C021, 65nm process with a Back-End-Of-Line (BEOL) stack consisting of eight levels of standard thickness aluminum metal. The total stack height from the surface of the passivation to the silicon surface is 20.7μm based on nominal layer thickness. Accounting for energy loss through the 1mil thick Aramica beam port window, the 40mm air gap and the BEOL stack over the ADC3664-SEP, the effective LET (LETEFF) at the surface of the silicon substrate, the depth, and the ion range was determined with the SEUSS 2020 software that was provided by the Texas A&M University Cyclotron Institute and based on the latest SRIM-2013models (4, 5). Table 4-1 lists the results.

Table 4-1 Ion LETEFF Depth and Range in Silicon
Ion TypeAngle of Incidence (°)RangeEFF in Silicon (µm)LETEFF (MeV × cm2/mg)
109Ag076.651.12