SBASAK2C March   2022  – May 2025 AFE7903

PRODUCTION DATA  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Specifications
    1. 4.1  Absolute Maximum Ratings
    2. 4.2  ESD Ratings
    3. 4.3  Recommended Operating Conditions
    4. 4.4  Thermal Information
    5. 4.5  Transmitter Electrical Characteristics
    6. 4.6  RF ADC Electrical Characteristics
    7. 4.7  PLL/VCO/Clock Electrical Characteristics
    8. 4.8  Digital Electrical Characteristics
    9. 4.9  Power Supply Electrical Characteristics
    10. 4.10 Timing Requirements
    11. 4.11 Switching Characteristics
    12. 4.12 Typical Characteristics
      1. 4.12.1  RX Typical Characteristics 30 MHz and 400 MHz
      2. 4.12.2  RX Typical Characteristics at 800 MHz
      3. 4.12.3  RX Typical Characteristics 1.75 GHz to 1.9 GHz
      4. 4.12.4  RX Typical Characteristics 2.6 GHz
      5. 4.12.5  RX Typical Characteristics 3.5 GHz
      6. 4.12.6  RX Typical Characteristics 4.9 GHz
      7. 4.12.7  RX Typical Characteristics 6.8 GHz
      8. 4.12.8  TX Typical Characteristics at 30 MHz and 600 MHz
      9. 4.12.9  TX Typical Characteristics at 800 MHz
      10. 4.12.10 TX Typical Characteristics at 1.8 GHz
      11. 4.12.11 TX Typical Characteristics at 2.6 GHz
      12. 4.12.12 TX Typical Characteristics at 3.5 GHz
      13. 4.12.13 TX Typical Characteristics at 4.9 GHz
      14. 4.12.14 TX Typical Characteristics at 7.1 GHz
      15. 4.12.15 PLL and Clock Typical Characteristics
  6. 5Device and Documentation Support
    1. 5.1 Receiving Notification of Documentation Updates
    2. 5.2 Support Resources
    3. 5.3 Trademarks
    4. 5.4 Electrostatic Discharge Caution
    5. 5.5 Glossary
  7. 6Revision History
  8. 7Mechanical, Packaging, and Orderable Information

4.12.5 RX Typical Characteristics 3.5 GHz

Typical values at TA = +25°C, ADC Sampling Rate = 2949.12 GHz. Default conditions: output sample rate = 491.52 MSPS (decimate by 6), PLL clock mode with fREF = 491.52 MHz, AIN = –3 dBFS, DSA setting = 4 dB.

AFE7903 RX In-Band Gain Flatness, fIN = 3600 MHz
With 3.6 GHz matching, normalized to 3.6 GHz
Figure 4-137 RX In-Band Gain Flatness, fIN = 3600 MHz
AFE7903 RX Uncalibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 4-139 RX Uncalibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
AFE7903 RX Uncalibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 4-141 RX Uncalibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
AFE7903 RX Uncalibrated Phase Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 4-143 RX Uncalibrated Phase Error vs DSA Setting at 3.6 GHz
AFE7903 RX Uncalibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-145 RX Uncalibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
AFE7903 RX Output FFT at 3.6 GHz
With 3.6 GHz matching , fIN = 3610 MHz, AIN = –3 dBFS
Figure 4-147 RX Output FFT at 3.6 GHz
AFE7903 RX IMD3 vs Input Level and Temperature at 3.6 GHz
With 3.5 GHz matching, 20-MHz tone spacing
Figure 4-149 RX IMD3 vs Input Level and Temperature at 3.6 GHz
AFE7903 RX IMD3 vs Tone Spacing at 3.76 GHz
External clock mode, 2x Decimation
Figure 4-151 RX IMD3 vs Tone Spacing at 3.76 GHz
AFE7903 RX HD2 vs DSA Setting and Temperature at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-153 RX HD2 vs DSA Setting and Temperature at 3.6 GHz
AFE7903 RX HD2 vs Input Level and Temperature at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-155 RX HD2 vs Input Level and Temperature at 3.6 GHz
AFE7903 RX HD2 vs Input Level
External clock mode, 25°C, 2x Decimation
Figure 4-157 RX HD2 vs Input Level
AFE7903 RX HD3 vs DSA Setting and Temperature at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-159 RX HD3 vs DSA Setting and Temperature at 3.6 GHz
AFE7903 RX HD3 vs Input Level and Temperature at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-161 RX HD3 vs Input Level and Temperature at 3.6 GHz
AFE7903 RX HD3 vs Input Level
External clock mode, 25°C, 2x Decimation
Figure 4-163 RX HD3 vs Input Level
AFE7903 RX Noise Spectral Density vs Input Level at 3.76 GHz
External clock mode, 25°C, 2x Decimation
Figure 4-165 RX Noise Spectral Density vs Input Level at 3.76 GHz
AFE7903 RX SFDR Excluding HD2/3 vs DSA Setting and Channel at 3.6 GHz
With 3.5 GHz matching
Figure 4-167 RX SFDR Excluding HD2/3 vs DSA Setting and Channel at 3.6 GHz
AFE7903 RX 2-tone SFDR vs Input Amplitude and Frequency at 3.7 GHz
External clock mode, 20 MHz tone spacing, excluding 3rd order distortion
Figure 4-169 RX 2-tone SFDR vs Input Amplitude and Frequency at 3.7 GHz
AFE7903 RX IMD5 vs Supply Voltage and Channel at 3.6 GHz
With 3.6 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 4-171 RX IMD5 vs Supply Voltage and Channel at 3.6 GHz
AFE7903 RX Input Phase vs Temperature at 3.6 GHz
With 3.6 GHz matching, normalized to phase at 25°C
Figure 4-138 RX Input Phase vs Temperature at 3.6 GHz
AFE7903 RX Calibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Differential Amplitude Error = PIN(DSA Setting – 1) – PIN(DSA Setting) + 1
Figure 4-140 RX Calibrated Differential Amplitude Error vs DSA Setting at 3.6 GHz
AFE7903 RX Calibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Integrated Amplitude Error = PIN(DSA Setting) – PIN(DSA Setting = 0) + (DSA Setting)
Figure 4-142 RX Calibrated Integrated Amplitude Error vs DSA Setting at 3.6 GHz
AFE7903 RX Calibrated Differential Phase Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Differential Phase Error = PhaseIN(DSA Setting – 1) – PhaseIN(DSA Setting)
Figure 4-144 RX Calibrated Differential Phase Error vs DSA Setting at 3.6 GHz
AFE7903 RX Calibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
With 3.6 GHz matching
Integrated Phase Error = Phase(DSA Setting) – Phase(DSA Setting = 0)
Figure 4-146 RX Calibrated Integrated Phase Error vs DSA Setting at 3.6 GHz
AFE7903 RX IMD3 vs DSA Setting and Temperature at 3.6 GHz
With 3.5 GHz matching, each tone at –7 dBFS, 20-MHz tone spacing
Figure 4-148 RX IMD3 vs DSA Setting and Temperature at 3.6 GHz
AFE7903 RX IMD3 vs Input Level
External clock mode, 20-MHz tone spacing, 2x Decimation
Figure 4-150 RX IMD3 vs Input Level
AFE7903 RX HD2 vs DSA Setting and Channel at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-152 RX HD2 vs DSA Setting and Channel at 3.6 GHz
AFE7903 RX HD2 vs Input Level and Channel at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-154 RX HD2 vs Input Level and Channel at 3.6 GHz
AFE7903 RX HD2 vs Input Level at 3.76 GHz
External clock mode, 2x Decimation
Figure 4-156 RX HD2 vs Input Level at 3.76 GHz
AFE7903 RX HD3 vs DSA Setting and Channel at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-158 RX HD3 vs DSA Setting and Channel at 3.6 GHz
AFE7903 RX HD3 vs Input Level and Channel at 3.6 GHz
With 3.5 GHz matching, DDC bypass mode (TI only mode for characterization)
Figure 4-160 RX HD3 vs Input Level and Channel at 3.6 GHz
AFE7903 RX HD3 vs Input Level at 3.76GHz
External clock mode, 2x Decimation
Figure 4-162 RX HD3 vs Input Level at 3.76GHz
AFE7903 RX Noise Spectral Density vs Input Level and DSA Setting at 3.6 GHz
With 3.5 GHz matching, 12.5-MHz offset from tone
Figure 4-164 RX Noise Spectral Density vs Input Level and DSA Setting at 3.6 GHz
AFE7903 RX In-Band SFDR (±200 MHz) vs Input Level and Channel at 3.6 GHz
With 3.5 GHz matching
Figure 4-166 RX In-Band SFDR (±200 MHz) vs Input Level and Channel at 3.6 GHz
AFE7903 RX 2-tone SFDR vs Input Amplitude and DSA Setting at 3.7 GHz
External clock mode, 20 MHz tone spacing, excluding 3rd order distortion
Figure 4-168 RX 2-tone SFDR vs Input Amplitude and DSA Setting at 3.7 GHz
AFE7903 RX IMD3 vs Supply Voltage and Channel at 3.6 GHz
With 3.6 GHz matching, –7 dBFS each tone, 20-MHz tone spacing, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 4-170 RX IMD3 vs Supply Voltage and Channel at 3.6 GHz
AFE7903 RX Noise Spectral Density vs Supply Voltage and Channel at 3.6 GHz
With 3.6 GHz matching, tone at –20 dBFS, 12.5-MHz offset frequency, all supplies at MIN, TYP, or MAX recommended operating voltages
Figure 4-172 RX Noise Spectral Density vs Supply Voltage and Channel at 3.6 GHz