SBASAZ5A October   2024  – September 2025 AMC0386-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Power Ratings
    6. 6.6  Insulation Specifications
    7. 6.7  Safety-Related Certifications
    8. 6.8  Safety Limiting Values
    9. 6.9  Electrical Characteristics
    10. 6.10 Switching Characteristics
    11. 6.11 Timing Diagrams
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Isolation Channel Signal Transmission
      4. 7.3.4 Digital Output
        1. 7.3.4.1 Output Behavior in Case of a Full-Scale Input
        2. 7.3.4.2 Output Behavior in Case of a Missing High-Side Supply
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Input Filter Design
        2. 8.2.2.2 Bitstream Filtering
        3. 8.2.2.3 Application Curve
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

6.9 Electrical Characteristics

minimum and maximum specifications apply from TA = –40°C to +125°C, AVDD = 3.0 V to 5.5 V, DVDD = 2.7 V to 5.5 V, VSNSP = –1 V to +1 V, and VSNSN = 0V; typical specifications are at TA = 25°C, AVDD = 5 V, DVDD = 3.3 V, and fCLKIN = 10 MHz (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
ANALOG INPUT
RIN Input resistance AMC0386M06-Q1 10 MΩ
AMC0386M10-Q1 12.5
Nominal resistive divider ratio VHVIN / VSNSP, AMC0386M06-Q1 598 601 604
VHVIN / VSNSP, AMC0386M10-Q1
 997 1001 1005
CMTI Common-mode transient immunity 150 V/ns
DC ACCURACY
EO Input offset error Referred to SNSP, TA = 25°C, HVIN = AGND –0.9 ±0.08 0.9 mV
Referred to HVIN, TA = 25°C, HVIN = AGND
AMC0386M06-Q1		 –540 ±50 540
Referred to HVIN, TA = 25°C, HVIN = AGND
AMC0386M10-Q1		 –900 ±80 900
TCEO Offset error temperature drift(3) Referred to SNSP, TA = 25°C, HVIN = AGND
 0.0035 0.007 mV/°C
Referred to HVIN, HVIN = AGND
AMC0386M06-Q1		 2.1 4.2
Referred to HVIN, HVIN = AGND
AMC0386M10-Q1		 3.5 7
EA Attenuation error(1)(6) TA = 25°C –0.25 ±0.02 0.25 %
TCEA Attenuation error temperature drift(4) –30 ±8 30 ppm/°C
INL Integral nonlinearity(2) Resolution: 16 bits –9 ±1.9 9 LSB
DNL Differential nonlinearity Resolution: 16 bits –0.99 0.99 LSB
PSRR Power-supply rejection ratio(5) AVDD DC PSRR, HVIN = AGND,
AVDD from 3.0V to 5.5V		 –83 dB
AVDD AC PSRR, HVIN = AGND,
AVDD with 10kHz / 100mV ripple
 –54
AC ACCURACY
SNR Signal-to-noise ratio VSNSP = 2VPP, SNSN = AGND, fIN = 1kHz
 84.5 89 dB
SINAD Signal-to-noise + distortion VSNSP = 2VPP, SNSN = AGND, fIN = 1kHz
 76 84 dB
THD Total harmonic distortion VSNSP = 2VPP, SNSN = AGND, fIN = 1kHz –88 –77 dB
DIGITAL INPUT (CMOS Logic With Schmitt-Trigger)
IIN Input current DGND ≤ VIN ≤ DVDD 7 µA
CIN Input capacitance 4 pF
VIH High-level input voltage 0.7 x DVDD DVDD + 0.3 V
VIL Low-level input voltage –0.3 0.3 x DVDD V
DIGITAL OUTPUT (CMOS)
CLOAD Output load capacitance fCLKIN = 10MHz 15 30 pF
VOH High-level output voltage IOH = –4mA DVDD – 0.4 V
VOL Low-level output voltage IOL = 4mA 0.4 V
POWER SUPPLY
IAVDD High-side supply current 5.3 7 mA
IDVDD Low-side supply current CLOAD = 15pF 3.6 5 mA
AVDDUV High-side undervoltage detection threshold AVDD rising, 
 2.4 2.6 2.8 V
AVDD falling, 
 1.9 2.05 2.2
DVDDUV Low-side undervoltage detection threshold DVDD rising 2.3 2.5 2.7 V
DVDD falling, 
 1.9 2.05 2.2
(1) The typical value includes one sigma statistical variation.
(2) Integral nonlinearity is defined as the maximum deviation from a straight line passing through the end-points of the ideal ADC transfer
function expressed as number of LSBs or as a percent of the specified linear full-scale range FSR.
(3) Offset error drift is calculated using the box method, as described by the following equation:
TCEO = (valueMAX - valueMIN) / TempRange
(4) Attenuation error drift is calculated using the box method, as described by the following equation:
TCEA (ppm) = ((valueMAX - valueMIN) / (value x TempRange)) X 106
(5) This parameter is referred to SNSP.
(6) Includes any error from the resistive divider at the input.