SBASB32 December 2025 AMC0303M0510
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| fCLK | Internal clock frequency | 9.4 | 10 | 10.6 | MHz | |
| dCLK | Internal clock duty cycle | dCLK = tHIGH / tCLK, tCLK = 1/fCLK | 45% | 50% | 55% | |
| tH | DOUT hold time after rising edge of CLKOUT | CLOAD = 15pF | 7 | ns | ||
| tD | DOUT delay time after rising edge of CLKOUT | CLOAD = 15pF | 16 | ns | ||
| tr | DOUT and CLKOUT rise time | 10% to 90%, 2.7V ≤ DVDD ≤ 3.6V, CLOAD = 15 pF | 2.5 | 6 | ns | |
| 10% to 90%, 4.5V ≤ DVDD ≤ 5.5V, CLOAD = 15 pF | 3.0 | 6 | ||||
| tf | DOUT and CLKOUT fall time | 10% to 90%, 2.7V ≤ DVDD ≤ 3.6V, CLOAD = 15 pF | 2.7 | 6 | ns | |
| 10% to 90%, 4.5V ≤ DVDD ≤ 5.5V, CLOAD = 15 pF | 3.3 | 6 | ||||
| tSTART | Device start-up time | AVDD step from 0 to 3.0V with DVDD ≥ 2.7V to bitstream valid, 0.1% settling | 100 | µs | ||